Suphachai Sutanthavibul Coauthor index DBLP Vis pubzone.org

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7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLH. Chang, Eugene Shragowitz, Jian Liu, Habib Youssef, Bing Lu, Suphachai Sutanthavibul: Net criticality revisited: an effective method to improve timing in physical design. ISPD 2002: 155-160
1993
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSuphachai Sutanthavibul, Eugene Shragowitz, Rung-Bin Lin: An adaptive timing-driven placement for high performance VLSIs. IEEE Trans. on CAD of Integrated Circuits and Systems 12(10): 1488-1498 (1993)
1992
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLHabib Youssef, Eugene Shragowitz, Suphachai Sutanthavibul: Prelayout timing analysis of cell-based VLSI designs. Computer-Aided Design 24(7): 367-379 (1992)
1991
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSuphachai Sutanthavibul, Eugene Shragowitz: Dynamic Prediction of Critical Paths and Nets for Constructive Timing-Driven Placement. DAC 1991: 632-635
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSuphachai Sutanthavibul, Eugene Shragowitz, J. Ben Rosen: An analytical approach to floorplan design and optimization. IEEE Trans. on CAD of Integrated Circuits and Systems 10(6): 761-769 (1991)
1990
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSuphachai Sutanthavibul, Eugene Shragowitz, J. Ben Rosen: An Analytical Approach to Floorplan Design and Optimization. DAC 1990: 187-192
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLSuphachai Sutanthavibul, Eugene Shragowitz: An Adaptive Timing-Driven Layout for High Speed VLSI. DAC 1990: 90-95

Coauthor Index

1H. Chang [7]
2Rung-Bin Lin [6]
3Jian Liu [7]
4Bing Lu [7]
5J. Ben Rosen [2] [3]
6Eugene Shragowitz [1] [2] [3] [4] [5] [6] [7]
7Habib Youssef [5] [7]

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