 | 2009 |
| 14 |  | Minoru Saeki,
Daisuke Suzuki,
Koichi Shimizu,
Akashi Satoh:
A Design Methodology for a DPA-Resistant Cryptographic LSI with RSL Techniques.
CHES 2009: 189-204 |
| 13 |  | Mie Nakatani,
Daisuke Suzuki,
Nobuchika Sakata,
Shogo Nishida:
A Study of Auditory Warning Signals for the Design Guidelines of Man-Machine Interfaces.
HCI (9) 2009: 826-834 |
| 12 |  | Minoru Sakairi,
Ayako Nishimura,
Daisuke Suzuki:
Olfaction Presentation System Using Odor Scanner and Odor-Emitting Apparatus Coupled with Chemical Capsules of Alginic Acid Polymer.
IEICE Transactions 92-A(2): 618-629 (2009) |
| 2008 |
| 11 |  | Koichi Shimizu,
Daisuke Suzuki,
Toyohiro Tsurumaru:
High-Speed Search System for PGP Passphrases.
CANS 2008: 332-348 |
| 10 |  | Minoru Saeki,
Daisuke Suzuki:
Security Evaluations of MRSL and DRSL Considering Signal Delays.
IEICE Transactions 91-A(1): 176-183 (2008) |
| 9 |  | Daisuke Suzuki,
Minoru Saeki:
An Analysis of Leakage Factors for Dual-Rail Pre-Charge Logic Style.
IEICE Transactions 91-A(1): 184-192 (2008) |
| 2007 |
| 8 |  | Daisuke Suzuki:
How to Maximize the Potential of FPGA Resources for Modular Exponentiation.
CHES 2007: 272-288 |
| 7 |  | Daisuke Suzuki,
Minoru Saeki,
Tetsuya Ichikawa:
Random Switching Logic: A New Countermeasure against DPA and Second-Order DPA at the Logic Level.
IEICE Transactions 90-A(1): 160-168 (2007) |
| 6 |  | Minoru Saeki,
Daisuke Suzuki,
Tetsuya Ichikawa:
Leakage Analysis of DPA Countermeasures at the Logic Level.
IEICE Transactions 90-A(1): 169-178 (2007) |
| 5 |  | Mutsumi Kimura,
Shigeki Sawamura,
Masakazu Kato,
Yuji Hara,
Daisuke Suzuki,
Hiroyuki Hara,
Satoshi Inoue:
Pulse-Width Modulation with Current Uniformization for TFT-OLEDs.
IEICE Transactions 90-C(11): 2076-2082 (2007) |
| 2006 |
| 4 |  | Akira Utsumi,
Daisuke Suzuki:
Word Vectors and Two Kinds of Similarity.
ACL 2006 |
| 3 |  | Daisuke Suzuki,
Minoru Saeki:
Security Evaluation of DPA Countermeasures Using Dual-Rail Pre-charge Logic Style.
CHES 2006: 255-269 |
| 2005 |
| 2 |  | Daisuke Suzuki,
Minoru Saeki,
Tetsuya Ichikawa:
DPA Leakage Models for CMOS Logic Circuits.
CHES 2005: 366-382 |
| 2000 |
| 1 |  | Daisuke Suzuki,
Tsuyoshi Miyazaki,
Koji Yamada,
Tsuyoshi Nakamura,
Hidenori Itoh:
A Supporting System for Colored Knitting Design.
IEA/AIE 2000: 420-425 |