 | 2009 |
| 14 |  | Martin Thuresson,
Magnus Själander,
Magnus Björk,
Lars J. Svensson,
Per Larsson-Edefors,
Per Stenström:
FlexCore: Utilizing Exposed Datapath Control for Efficient Computing.
Signal Processing Systems 57(1): 5-19 (2009) |
| 2008 |
| 13 |  | Daniel A. Andersson,
Lars J. Svensson,
Per Larsson-Edefors:
Noise-Aware On-Chip Power Grid Considerations Using a Statistical Approach.
ISQED 2008: 663-669 |
| 12 |  | Daniel A. Andersson,
Simon Kristiansson,
Lars J. Svensson,
Per Larsson-Edefors,
Kjell O. Jeppson:
Noise Interaction Between Power Distribution Grids and Substrate.
ISQED 2008: 84-89 |
| 2007 |
| 11 |  | Nadine Azémard,
Lars J. Svensson:
Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings
Springer 2007 |
| 10 |  | Martin Thuresson,
Magnus Själander,
Magnus Björk,
Lars J. Svensson,
Per Larsson-Edefors,
Per Stenström:
FlexCore: Utilizing Exposed Datapath Control for Efficient Computing.
ICSAMOS 2007: 18-25 |
| 9 |  | Mindaugas Drazdziulis,
Per Larsson-Edefors,
Lars J. Svensson:
Overdrive Power-Gating Techniques for Total Power Minimization.
ISVLSI 2007: 125-132 |
| 2005 |
| 8 |  | Daniel A. Andersson,
Lars J. Svensson,
Per Larsson-Edefors:
Accounting for the skin effect during repeater insertion.
ACM Great Lakes Symposium on VLSI 2005: 32-37 |
| 2004 |
| 7 |  | Daniel A. Andersson,
Lars J. Svensson,
Per Larsson-Edefors:
On Skin Effect in On-Chip Interconnects.
PATMOS 2004: 463-470 |
| 2003 |
| 6 |  | Daniel Eckerbert,
Lars J. Svensson,
Per Larsson-Edefors:
A Mixed-Mode Delay-Locked-Loop Architecture.
ICCD 2003: 261-263 |
| 5 |  | Per Larsson-Edefors,
Daniel Eckerbert,
Henrik Eriksson,
Lars J. Svensson:
Dual Threshold Voltage Circuits in the Presence of Resistive Interconnects.
ISVLSI 2003: 225-230 |
| 2001 |
| 4 |  | Henrik Eriksson,
Kimmo Eriksson,
Johan Karlander,
Lars J. Svensson,
Johan Wästlund:
Sorting a bridge hand.
Discrete Mathematics 241(1-3): 289-300 (2001) |
| 1997 |
| 3 |  | William C. Athas,
Nestoras Tzartzanis,
Lars J. Svensson,
Lena Peterson,
Huimin Li,
Xing Yu Jiang,
Peiqing Wang,
W.-C. Liu:
AC-1: a clock-powered microprocessor.
ISLPED 1997: 328-333 |
| 1996 |
| 2 |  | William C. Athas,
W.-C. Liu,
Lars J. Svensson:
Energy-recovery CMOS for highly pipelined DSP designs.
ISLPED 1996: 101-104 |
| 1994 |
| 1 |  | William C. Athas,
Lars J. Svensson,
J. G. Koller,
Nestoras Tzartzanis,
E. Ying-Chin Chou:
Low-power digital systems based on adiabatic-switching principles.
IEEE Trans. VLSI Syst. 2(4): 398-407 (1994) |