 | 2009 |
| 16 |  | Noboru Tanabe,
Manami Sasaki,
Hironori Nakajo,
Masami Takata,
Kazuki Joe:
The architecture of visualization system using memory with memory-side gathering and CPUs with DMA-type memory accessing.
PDPTA 2009: 427-433 |
| 2008 |
| 15 |  | Noboru Tanabe,
Hironori Nakajo:
An Enhancer of Memory and Network for Cluster and its Applications.
PDCAT 2008: 99-106 |
| 14 |  | Noboru Tanabe,
Hironori Nakajo:
Introduction to Acceleration for MPI Derived Datatypes Using an Enhancer of Memory and Network.
PVM/MPI 2008: 324-325 |
| 2007 |
| 13 |  | Atushi Ohta,
Yoshihiro Hamada,
Akira Kitamura,
Noboru Tanabe,
Hideharu Amano,
Hironori Nakajo:
Implementation and Evaluation of Multicast Mechanism on Network Interface Plugged into a Memory Slot.
PDPTA 2007: 787-793 |
| 12 |  | Akira Kitamura,
Yasuo Miyabe,
Tomotaka Miyashiro,
Noboru Tanabe,
Hironori Nakajo,
Hideharu Amano:
Performance evaluation on low-latency communication mechanism of DIMMnet-2.
Parallel and Distributed Computing and Networks 2007: 57-62 |
| 11 |  | Konosuke Watanabe,
Tomohiro Otsuka,
Junichiro Tsuchiya,
Hiroaki Nishi,
Junji Yamamoto,
Noboru Tanabe,
Tomohiro Kudoh,
Hideharu Amano:
Martini: A Network Interface Controller Chip for High Performance Computing with Distributed PCs.
IEEE Trans. Parallel Distrib. Syst. 18(9): 1282-1295 (2007) |
| 2006 |
| 10 |  | Tomotaka Miyashiro,
Akira Kitamura,
Hironori Nakajo,
Noboru Tanabe:
DIMMnet-2: A Reconfigurable Board Connected Into a Memory Slot.
FPL 2006: 1-4 |
| 9 |  | Jun Kanai,
Takuro Mori,
Takeshi Araki,
Noboru Tanabe,
Hironori Nakajo,
Mitaro Namiki:
Implementation of PC Cluster System with Memory Mapped File by Commodity OS.
PDPTA 2006: 902-908 |
| 2005 |
| 8 |  | Akira Kitamura,
Yasuo Miyabe,
Tetsu Izawa,
Tomotaka Miyashiro,
Konosuke Watanabe,
Tomohiro Otsuka,
Hideharu Amano,
Yoshihiro Hamada,
Noboru Tanabe,
Hironori Nakajo:
Evaluation of Network Interface Controller on DIMMnet-2 Prototype Board.
PDCAT 2005: 778-780 |
| 7 |  | Yoshihiro Hamada,
Hiroaki Nishi,
Akira Kitamura,
Noboru Tanabe,
Hideharu Amano,
Hironori Nakajo:
A Packet Forwarding Layer for DIMMnet and its Hardware Implementation.
PDPTA 2005: 461-467 |
| 2004 |
| 6 |  | Noboru Tanabe,
Hironori Nakajo,
Hirotaka Hakozaki,
Masasige Nakatake,
Yasunori Dohi,
Hideharu Amano:
A New Memory Module for Memory Intensive Applications.
PARELEC 2004: 123-128 |
| 2002 |
| 5 |  | Noboru Tanabe,
Yoshihiro Hamada,
Hironori Nakajo,
Hideki Imashiro,
Junji Yamamoto,
Tomohiro Kudoh,
Hideharu Amano:
Low Latency Communication on DIMMnet-1 Network Interface Plugged into a DIMM Slot.
PARELEC 2002: 9-14 |
| 4 |  | Noboru Tanabe,
Junji Yamamoto,
Hiroaki Nishi,
Tomohiro Kudoh,
Yoshihiro Hamada,
Hironori Nakajo,
Hideharu Amano:
Low Latency High Bandwidth Message Transfer Mechanisms for a Network Interface Plugged into a Memory Slot.
Cluster Computing 5(1): 7-17 (2002) |
| 2000 |
| 3 |  | Noboru Tanabe,
Junji Yamamoto,
Hiroaki Nishi,
Tomohiro Kudoh,
Yoshihiro Hamada,
Hironori Nakajo,
Hideharu Amano:
MEMOnet : Network interface plugged into a memory slot.
CLUSTER 2000: 17-16 |
| 2 |  | Noboru Tanabe,
Junji Yamamoto,
Hiroaki Nishi,
Tomohiro Kudoh,
Yoshihiro Hamada,
Hironori Nakajo,
Hideharu Amano:
On-the-fly Sending: A Low Latency High Bandwidth Message Transfer Mechanism.
ISPAN 2000: 186-194 |
| 1991 |
| 1 |  | Noboru Tanabe,
Takashi Suzuoka,
Sadao Nakamura,
Yasushi Kawakura,
Shigeru Oyanagi:
Base-m n-cube: High Performance Interconnection Networks for Highly Parallel Computer PRODIGY.
ICPP (1) 1991: 509-516 |