Alexandre F. Tenca

	2006
16		Alexandre F. Tenca, Song Park, Lo'ai A. Tawalbeh: Carry-Save Representation Is Shift-Unsafe: The Problem and Its Solution. IEEE Trans. Computers 55(5): 630-635 (2006)
	2004
15		Lo'ai A. Tawalbeh, Alexandre F. Tenca: An Algorithm and Hardware Architecture for Integrated Modular Division and Multiplication in GF(p) and GF(2n). ASAP 2004: 247-257
14		Alexandre F. Tenca, Ajay C. Shantilal, Mohammed H. Sinky: Improved-Throughput Networks of Basic On-Line Arithmetic Modules for DSP Applications. ASAP 2004: 73-83
13		R. Galli, Alexandre F. Tenca: A design methodology for networks of online modules and its application to the Levinson-Durbin algorithm. IEEE Trans. VLSI Syst. 12(1): 52-66 (2004)
12		Adnan Abdul-Aziz Gutub, Alexandre F. Tenca: Efficient scalable VLSI architecture for Montgomery inversion in GF( p). Integration 37(2): 103-120 (2004)
	2003
11		Alexandre F. Tenca, Çetin Kaya Koç: A Scalable Architecture for Modular Multiplication Based on Montgomery's Algorithm. IEEE Trans. Computers 52(9): 1215-1221 (2003)
	2002
10		Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, Erkay Savas, Çetin Kaya Koç: Scalable and Unified Hardware to Compute Montgomery Inverse in GF(p) and GF(2). CHES 2002: 484-499
9		Adnan Abdul-Aziz Gutub, Alexandre F. Tenca, Çetin Kaya Koç: Scalable VLSI Architecture for GF(p) Montgomery Modular Inverse Computation. ISVLSI 2002: 53-58
	2001
8		Alexandre F. Tenca, Georgi Todorov, Çetin Kaya Koç: High-Radix Design of a Scalable Modular Multiplier. CHES 2001: 185-201
7		Alexandre F. Tenca, Syed Ubaid Hussaini: A Design of Radix-2 On-line Division Using LSA Organization. IEEE Symposium on Computer Arithmetic 2001: 266-
	2000
6		Erkay Savas, Alexandre F. Tenca, Çetin Kaya Koç: A Scalable and Unified Multiplier Architecture for Finite Fields GF(p) and GF(2m). CHES 2000: 277-292
	1999
5		Alexandre F. Tenca, Çetin Kaya Koç: A Scalable Architecture for Montgomery Multiplication. CHES 1999: 94-108
4		Alexandre F. Tenca, Milos D. Ercegovac: On the Design of High-Radix On-Line Division for Long Precision. IEEE Symposium on Computer Arithmetic 1999: 44-51
	1998
3		Alexandre F. Tenca, Milos D. Ercegovac: A Variable Long-Precision Arithmetic Unit Design for Reconfigurable Coprocessor Architectures. FCCM 1998: 216-225
2		Mircea R. Stan, Alexandre F. Tenca, Milos D. Ercegovac: Long and Fast Up/Down Counters. IEEE Trans. Computers 47(7): 722-735 (1998)
	1997
1		Alexandre F. Tenca, Milos D. Ercegovac: Synchronous Up/Down Binary Counter for LUT FPGAs with Counting Frequency Independent of Counter Size. FPGA 1997: 159-165

Coauthor Index

1	Milos D. Ercegovac	[1] [2] [3] [4]
2	R. Galli	[13]
3	Adnan Abdul-Aziz Gutub	[9] [10] [12]
4	Syed Ubaid Hussaini	[7]
5	Çetin Kaya Koç	[5] [6] [8] [9] [10] [11]
6	Song Park	[16]
7	Erkay Savas	[6] [10]
8	Ajay C. Shantilal	[14]
9	Mohammed H. Sinky	[14]
10	Mircea R. Stan	[2]
11	Lo'ai A. Tawalbeh	[15] [16]
12	Georgi Todorov	[8]

Colors in the list of coauthors