 | 2009 |
|---|
| 5 |       | Daniel Tille,
Rolf Drechsler:
A fast untestability proof for SAT-based ATPG.
DDECS 2009: 38-43 |
| 2008 |
|---|
| 4 | | Daniel Tille,
Rolf Drechsler:
Incremental SAT Instance Generation for SAT-based ATPG.
DDECS 2008: 68-73 |
| 3 | | Rolf Drechsler,
Stephan Eggersglüß,
Görschwin Fey,
Andreas Glowatz,
Friedrich Hapke,
Jürgen Schlöffel,
Daniel Tille:
On Acceleration of SAT-Based ATPG for Industrial Designs.
IEEE Trans. on CAD of Integrated Circuits and Systems 27(7): 1329-1333 (2008) |
| 2007 |
|---|
| 2 |  | Daniel Tille,
Görschwin Fey,
Rolf Drechsler:
Instance Generation for SAT-based ATPG.
DDECS 2007: 153-156 |
| 1 | | Stephan Eggersglüß,
Daniel Tille,
Görschwin Fey,
Rolf Drechsler,
Andreas Glowatz,
Friedrich Hapke,
Jürgen Schlöffel:
Experimental Studies on SAT-Based ATPG for Gate Delay Faults.
ISMVL 2007: 6 |
