Kris Tiri

	2007
22		Patrick Schaumont, Kris Tiri: Masking and Dual-Rail Logic Don't Add Up. CHES 2007: 95-106
21		Kris Tiri: Side-Channel Attack Pitfalls. DAC 2007: 15-20
20		Kris Tiri, Onur Aciiçmez, Michael Neve, Flemming Andersen: An Analytical Model for Time-Driven Cache Attacks. FSE 2007: 399-413
19		Kris Tiri, Ingrid Verbauwhede: Design Method for Constant Power Consumption of Differential Logic Circuits CoRR abs/0710.4756: (2007)
18		Kris Tiri, Ingrid Verbauwhede: A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs CoRR abs/0710.4806: (2007)
	2006
17		Kris Tiri, Patrick Schaumont, Ingrid Verbauwhede: Side-Channel Leakage Tolerant Architectures. ITNG 2006: 204-209
16		Kris Tiri, Patrick Schaumont: Changing the Odds Against Masked Logic. Selected Areas in Cryptography 2006: 134-146
15		David Hwang, Patrick Schaumont, Kris Tiri, Ingrid Verbauwhede: Securing Embedded Systems. IEEE Security & Privacy 4(2): 40-49 (2006)
14		Mustafa Badaroglu, Kris Tiri, Geert Van der Plas, Piet Wambacq, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1146-1154 (2006)
13		Kris Tiri, Ingrid Verbauwhede: A digital design flow for secure integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1197-1208 (2006)
	2005
12		Alireza Hodjat, David Hwang, Bo-Cheng Lai, Kris Tiri, Ingrid Verbauwhede: A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-µm CMOS technology. ACM Great Lakes Symposium on VLSI 2005: 60-63
11		Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede: Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment. CHES 2005: 354-365
10		Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede: A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing. DAC 2005: 222-227
9		Kris Tiri, Ingrid Verbauwhede: Simulation models for side-channel information leaks. DAC 2005: 228-233
8		Kris Tiri, Ingrid Verbauwhede: A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs. DATE 2005: 58-63
7		Kris Tiri, Ingrid Verbauwhede: Design Method for Constant Power Consumption of Differential Logic Circuits. DATE 2005: 628-633
	2004
6		Kris Tiri, Ingrid Verbauwhede: Place and Route for Secure Standard Cell Design. CARDIS 2004: 143-158
5		Yusuke Matsuoka, Patrick Schaumont, Kris Tiri, Ingrid Verbauwhede: Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques. CASES 2004: 303-311
4		Kris Tiri, Ingrid Verbauwhede: A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. DATE 2004: 246-251
3		Kris Tiri, Ingrid Verbauwhede: Secure Logic Synthesis. FPL 2004: 1052-1056
	2003
2		Kris Tiri, Ingrid Verbauwhede: Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology. CHES 2003: 125-136
	2002
1		Mustafa Badaroglu, Kris Tiri, Stéphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen: Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients. DAC 2002: 399-404

Coauthor Index

1	Onur Aciiçmez	[20]
2	Flemming Andersen	[20]
3	Mustafa Badaroglu	[1] [14]
4	Stéphane Donnay	[1] [14]
5	Georges G. E. Gielen	[1] [14]
6	Alireza Hodjat	[10] [11] [12]
7	David Hwang	[10] [11] [12] [15]
8	Bo-Cheng Lai (Bo-Cheng Charles Lai)	[10] [11] [12]
9	Hugo De Man	[1] [14]
10	Yusuke Matsuoka	[5]
11	Michael Neve	[20]
12	Geert Van der Plas	[14]
13	Patrick Schaumont	[5] [10] [11] [15] [16] [17] [22]
14	Ingrid Verbauwhede	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [17] [18] [19]
15	Piet Wambacq	[1] [14]
16	Shenglin Yang	[10] [11]

Colors in the list of coauthors