Vivek Tiwari

	2009
26		Sudip Misra, Vivek Tiwari, Mohammad S. Obaidat: Lacas: learning automata-based congestion avoidance scheme for healthcare wireless sensor networks. IEEE Journal on Selected Areas in Communications 27(4): 466-479 (2009)
	2005
25		Kaushik Roy, Vivek Tiwari: Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005 ACM 2005
	2004
24		Rajiv V. Joshi, Kiyoung Choi, Vivek Tiwari, Kaushik Roy: Proceedings of the 2004 International Symposium on Low Power Electronics and Design, 2004, Newport Beach, California, USA, August 9-11, 2004 ACM 2004
	2003
23		Ed Grochowski, David Ayers, Vivek Tiwari: Microarchitectural dI/dt Control. IEEE Design & Test of Computers 20(3): 40-47 (2003)
	2002
22		Ed Grochowski, David Ayers, Vivek Tiwari: Microarchitectural Simulation and Control of di/dt-induced Power Supply Voltage Variation. HPCA 2002: 7-16
21		Wenjie Jiang, Vivek Tiwari, Erik de la Iglesia, Amit Sinha: Topological Analysis for Leakage Prediction of Digital Circuits. VLSI Design 2002: 39-44
	2001
20		Koen Danckaert, Chidamber Kulkarni, Francky Catthoor, Hugo De Man, Vivek Tiwari: A Systematic Approach for System Bus Load Reduction Applied to Medical Imaging. VLSI Design 2001: 48-
	2000
19		Mahadevamurty Nemani, Vivek Tiwari: Macro-driven circuit design methodology for high-performance datapaths. DAC 2000: 661-666
18		Lode Nachtergaele, Vivek Tiwari, Nikil D. Dutt: System and Architecture-Level Power Reduction for Microprocessor-Based Communication and Multi-Media Applications. ICCAD 2000: 569-573
17		David Brooks, Vivek Tiwari, Margaret Martonosi: Wattch: a framework for architectural-level power analysis and optimizations. ISCA 2000: 83-94
16		Giovanni De Micheli, Tony Correale, Pietro Erratico, Srini Raghvendra, Hugo De Man, Jerry Frankil, Vivek Tiwari: Do our low-power tools have enough horse power? (panel session) (title only). ISLPED 2000: 149
15		Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari: Inductive Noise Reduction at the Architectural Level. VLSI Design 2000: 162-167
	1999
14		Mondira Deb Pant, Pankaj Pant, D. Scott Wills, Vivek Tiwari: An architectural solution for the inductive noise problem due to clock-gating. ISLPED 1999: 255-257
	1998
13		Vivek Tiwari, Deo Singh, Suresh Rajgopal, Gaurav Mehta, Rakesh Patel, Franklin Baez: Reducing Power in High-Performance Microprocessors. DAC 1998: 732-737
12		Vivek Tiwari, Sharad Malik, Pranav Ashar: Guarded evaluation: pushing power management to logic synthesis/design. IEEE Trans. on CAD of Integrated Circuits and Systems 17(10): 1051-1060 (1998)
	1997
11		Vivek Tiwari, Ryan Donnelly, Sharad Malik, Ricardo Gonzalez: Dynamic Power Management for Microprocessors: A Case Study. VLSI Design 1997: 185-192
10		Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, Masahiro Fujita: Power analysis and minimization techniques for embedded DSP software. IEEE Trans. VLSI Syst. 5(1): 123-135 (1997)
	1996
9		Vivek Tiwari, Sharad Malik, Andrew Wolfe, Mike Tien-Chien Lee: Instruction Level Power Analysis and Optimization of Software. VLSI Design 1996: 326-328
8		Vivek Tiwari, Sharad Malik, Andrew Wolfe, Mike Tien-Chien Lee: Instruction level power analysis and optimization of software. VLSI Signal Processing 13(2-3): 223-238 (1996)
	1995
7		Vivek Tiwari, Mike Tien-Chien Lee: Power analysis of a 32-bit embedded microcontroller. ASP-DAC 1995
6		Vivek Tiwari, Sharad Malik, Pranav Ashar: Guarded evaluation: pushing power management to logic synthesis/design. ISLPD 1995: 221-226
5		Mike Tien-Chien Lee, Vivek Tiwari, Sharad Malik, Masahiro Fujita: Power analysis and low-power scheduling techniques for embedded DSP software. ISSS 1995: 110-115
	1994
4		Vivek Tiwari, Sharad Malik, Andrew Wolfe: Power analysis of embedded software: a first step towards software power minimization. ICCAD 1994: 384-390
3		Vivek Tiwari, Sharad Malik, Andrew Wolfe: Power analysis of embedded software: a first step towards software power minimization. IEEE Trans. VLSI Syst. 2(4): 437-445 (1994)
	1993
2		Vivek Tiwari, Pranav Ashar, Sharad Malik: Technology Mapping for Lower Power. DAC 1993: 74-79
1		Rodney Boleyn, James Debardelaben, Vivek Tiwari, Andrew Wolfe: A Split Data Cache for Superscalar Processors. ICCD 1993: 32-39

Coauthor Index

1	Pranav Ashar	[2] [6] [12]
2	David Ayers	[22] [23]
3	Franklin Baez	[13]
4	Rodney Boleyn	[1]
5	David Brooks	[17]
6	Francky Catthoor	[20]
7	Kiyoung Choi	[24]
8	Tony Correale	[16]
9	Koen Danckaert	[20]
10	James Debardelaben	[1]
11	Ryan Donnelly	[11]
12	Nikil D. Dutt (Nikil Dutt)	[18]
13	Pietro Erratico	[16]
14	Jerry Frankil	[16]
15	Masahiro Fujita	[5] [10]
16	Ricardo Gonzalez	[11]
17	Ed Grochowski	[22] [23]
18	Erik de la Iglesia	[21]
19	Wenjie Jiang	[21]
20	Rajiv V. Joshi	[24]
21	Chidamber Kulkarni	[20]
22	Mike Tien-Chien Lee	[5] [7] [8] [9] [10]
23	Sharad Malik	[2] [3] [4] [5] [6] [8] [9] [10] [11] [12]
24	Hugo De Man	[16] [20]
25	Margaret Martonosi	[17]
26	Gaurav Mehta	[13]
27	Giovanni De Micheli	[16]
28	Sudip Misra	[26]
29	Lode Nachtergaele	[18]
30	Mahadevamurty Nemani	[19]
31	Mohammad S. Obaidat	[26]
32	Mondira Deb Pant	[14] [15]
33	Pankaj Pant	[14] [15]
34	Rakesh Patel	[13]
35	Srini Raghvendra	[16]
36	Suresh Rajgopal	[13]
37	Kaushik Roy	[24] [25]
38	Deo Singh	[13]
39	Amit Sinha	[21]
40	D. Scott Wills	[14] [15]
41	Andrew Wolfe	[1] [3] [4] [8] [9]

Colors in the list of coauthors