| 2007 | ||
|---|---|---|
| 12 | Esteban Tlelo-Cuautle, M. A. Duarte-Villaseñor: Designing Chua's circuit from the behavioral to the transistor level of abstraction. Applied Mathematics and Computation 184(2): 715-720 (2007) | |
| 11 | Esteban Tlelo-Cuautle, Jesús M. Muñoz-Pacheco: Simulation of Chua's circuit by automatic control of step-size. Applied Mathematics and Computation 190(2): 1526-1533 (2007) | |
| 10 | Esteban Tlelo-Cuautle, Jesús M. Muñoz-Pacheco, J. Martínez-Carballido: Frequency scaling simulation of Chua's circuit by automatic determination and control of step-size. Applied Mathematics and Computation 194(2): 486-491 (2007) | |
| 2005 | ||
| 9 | Esteban Tlelo-Cuautle, Delia Torres-Muñoz, Leticia Torres-Papaqui: On the Computational Synthesis of CMOS Voltage Followers. IEICE Transactions 88-A(12): 3479-3484 (2005) | |
| 2004 | ||
| 8 | Jorge Aguila-Meza, Leticia Torres-Papaqui, Esteban Tlelo-Cuautle: Improving symbolic analysis in CMOS analog integrated circuits. ISCAS (5) 2004: 193-196 | |
| 7 | Carlos Sánchez-López, Esteban Tlelo-Cuautle: Symbolic noise analysis in analog integrated circuits. ISCAS (5) 2004: 245-248 | |
| 6 | Esteban Tlelo-Cuautle, A. Quintanar-Ramos, G. Gutiérrez-Pérez, M. González de la Rosa: SIASCA: Interactive System for the Symbolic Analysis of Analog Circuits. IEICE Electronic Express 1(1): 19-23 (2004) | |
| 2003 | ||
| 5 | Esteban Tlelo-Cuautle, Alejandro Díaz-Sánchez: An heuristic circuit-generation technique for the design-automation of analog circuits. ISCAS (1) 2003: 193-196 | |
| 4 | Carlos Sánchez-López, Alejandro Díaz-Sánchez, Esteban Tlelo-Cuautle: Analog implementation of MOS-translinear Morlet Wavelets. ISCAS (1) 2003: 393-396 | |
| 3 | Esteban Tlelo-Cuautle, Carlos Sánchez-López, F. Sandoval-Ibarra: Symbolic analysis: a formulation approach by manipulating data structures. ISCAS (4) 2003: 640-643 | |
| 2002 | ||
| 2 | Esteban Tlelo-Cuautle: Computing the elements embedded into a positive feedback loop. ISCAS (3) 2002: 531-534 | |
| 1 | Esteban Tlelo-Cuautle: An efficient biasing technique suitable for any kind of the four basic amplifiers designed at or level. ISCAS (3) 2002: 535-538 | |