Kenji Toda

	2008
26		Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda: Bitstream encryption and authentication with AES-GCM in dynamically reconfigurable systems. FPL 2008: 23-28
25		Yohei Hori, Akashi Satoh, Hirofumi Sakane, Kenji Toda: Bitstream Encryption and Authentication Using AES-GCM in Dynamically Reconfigurable Systems. IWSEC 2008: 261-278
24		Yohei Hori, Hiroyuki Yokoyama, Hirofumi Sakane, Kenji Toda: A Secure Content Delivery System Based on a Partially Reconfigurable FPGA. IEICE Transactions 91-D(5): 1398-1407 (2008)
	2007
23		Toshihiro Katashita, Yoshinori Yamaguchi, Atusi Maeda, Kenji Toda: FPGA-Based Intrusion Detection System for 10 Gigabit Ethernet. IEICE Transactions 90-D(12): 1923-1931 (2007)
	2006
22		Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi: Highly Efficient String Matching Circuit for IDS with FPGA. FCCM 2006: 285-286
21		Toshihiro Katashita, Atusi Maeda, Kenji Toda, Yoshinori Yamaguchi: A Method of Generating Highly Efficient String Matching Circuit for Intrusion Detection. FPL 2006: 1-4
20		Yohei Hori, Hiroyuki Yokoyama, Kenji Toda: Secure Content Distribution System Based on Run-Time Partial Hardware Reconfiguration. FPL 2006: 1-4
19		Kenji Toda, Yoshitaka Kawakami, Shin-ichiro Kousaka, Yutaka Ito, Akira Komeno, Kazuyoshi Uematsu, Mineo Sato: New Silicate Phosphors for a White LED. IEICE Transactions 89-C(10): 1406-1412 (2006)
	2005
18		Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki: Dynamic Load Balancing Using Network Transferable Computer. ICDCS Workshops 2005: 51-57
17		Hiroyuki Yokoyama, Kenji Toda: FPGA-Based Content Protection System for Embedded Consumer Electronics. RTCSA 2005: 502-507
	2003
16		Megumi Hisayuki, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda, Kuniyasu Suzaki: Adaptable Load Balancing Using Network Transferable Computer Associated with Mobile IP. ICDCS Workshops 2003: 8-13
	2000
15		Fuminori Nakanishi, Shinnya Hiraike, Shinji Inoue, Yoshiaki Kakuda, Kenji Toda: A Flexible Scheduling for Automobile Control Using Imprecise Computation and Its Fundamental Evaluation. ICECCS 2000: 210-217
	1999
14		Tetsuya Higuchi, Masaya Iwata, Didier Keymeulen, Hidenori Sakanashi, Masahiro Murakawa, Isamu Kajitani, Eiichi Takahashi, Kenji Toda, Mehrdad Salami, Nobuki Kajihara, Nobuyuki Otsu: Real-world applications of analog and digital evolvable hardware . IEEE Trans. Evolutionary Computation 3(3): 220-235 (1999)
	1998
13		Naoki Asakawa, Kenji Toda, Yoshimi Takeuchi: Automation of Chamfering by an industrial Robot, for the Case of Machined Hole on a Cylindrical Workpiece. ICRA 1998: 2452-2457
	1997
12		Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi: CODA-R: a reconfigurable testbed for real-time parallel computation. RTCSA 1997: 252-259
	1995
11		Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi: Performance comparison of real-time architectures using simulation. RTCSA 1995: 150-
	1994
10		Kenji Toda, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi: A Priority Forwarding Router Chip for Real-Time Interconnection Networks. IEEE Real-Time Systems Symposium 1994: 63-73
9		Yoshinori Yamaguchi, Kenji Toda, Kenji Nishida, Eiichi Takahashi: The Execution Model and the Architecture for Real-Time Parallel Systems. IFIP Congress (1) 1994: 177-182
	1993
8		Kenji Nishida, Kenji Toda, Toshio Shimada, Yoshinori Yamaguchi: The Hardware Architecture of the CODA Real-Time Parallel Processor. PARCO 1993: 395-402
	1992
7		Kenji Toda, Kenji Nishida, Shuichi Sakai, Toshio Shimada: A priority forwarding scheme for real-time multistage interconnection networks. IEEE Real-Time Systems Symposium 1992: 208-217
6		Toshio Shimada, Kenji Toda, Kenji Nishida: Real-Time Parallel Architecture for Sensor Funsion. J. Parallel Distrib. Comput. 15(2): 143-152 (1992)
	1991
5		Kenji Toda, Kenji Nishida, Yoshinobu Uchibori, Shuichi Sakai, Toshio Shimada: Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism. IPPS 1991: 336-343
	1989
4		Kenji Toda, Yoshinobu Uchibori, Toshitsugu Yuba: The Gene Concept and its Implementation for a Dataflow Schemed Parallel Computer. PARLE (1) 1989: 306-322
	1986
3		Jayantha A. Herath, Nobuo Saito, Kenji Toda, Yoshinori Yamaguchi, Toshitsugu Yuba: DBCL: Data-Flow Computing Base Language with n-Value Logic. FJCC 1986: 353-361
	1984
2		Yoshinori Yamaguchi, Kenji Toda, Jayantha A. Herath, Toshitsugu Yuba: EM-3: A Lisp-Based Data-Driven Machine. FGCS 1984: 524-532
	1983
1		Yoshinori Yamaguchi, Kenji Toda, Toshitsugu Yuba: A Performance Evaluation of a Lisp-Based Data-Driven Machine (EM-3) ISCA 1983: 363-369

Coauthor Index

1	Naoki Asakawa	[13]
2	Jayantha A. Herath	[2] [3]
3	Tetsuya Higuchi	[14]
4	Shinnya Hiraike	[15]
5	Megumi Hisayuki	[16] [18]
6	Yohei Hori	[20] [24] [25] [26]
7	Shinji Inoue	[15] [16] [18]
8	Yutaka Ito	[19]
9	Masaya Iwata	[14]
10	Nobuki Kajihara	[14]
11	Isamu Kajitani	[14]
12	Yoshiaki Kakuda	[15] [16] [18]
13	Toshihiro Katashita	[21] [22] [23]
14	Yoshitaka Kawakami	[19]
15	Didier Keymeulen	[14]
16	Jong Kim	[11]
17	Akira Komeno	[19]
18	Shin-ichiro Kousaka	[19]
19	Heejo Lee	[11]
20	Atusi Maeda	[21] [22] [23]
21	Masahiro Murakawa	[14]
22	Fuminori Nakanishi	[15]
23	Kenji Nishida	[5] [6] [7] [8] [9] [10] [11] [12]
24	Nobuyuki Otsu	[14]
25	Nobuo Saito	[3]
26	Shuichi Sakai	[5] [7]
27	Hidenori Sakanashi	[14]
28	Hirofumi Sakane	[24] [25] [26]
29	Mehrdad Salami	[14]
30	Mineo Sato	[19]
31	Akashi Satoh	[25] [26]
32	Toshio Shimada	[5] [6] [7] [8]
33	Kuniyasu Suzaki	[16] [18]
34	Eiichi Takahashi	[9] [10] [11] [12] [14]
35	Yoshimi Takeuchi	[13]
36	Yoshinobu Uchibori	[4] [5]
37	Kazuyoshi Uematsu	[19]
38	Yoshinori Yamaguchi	[1] [2] [3] [8] [9] [10] [11] [12] [21] [22] [23]
39	Hiroyuki Yokoyama	[17] [20] [24]
40	Toshitsugu Yuba	[1] [2] [3] [4]

Colors in the list of coauthors