 | 2008 |
|---|
| 5 |       | Han-Xin Sun,
Kun-Peng Yang,
Yulai Zhao,
Dong Tong,
Xu Cheng:
CASA: A New IFU Architecture for Power-Efficient Instruction Cache and TLB Designs.
J. Comput. Sci. Technol. 23(1): 141-153 (2008) |
| 2007 |
|---|
| 4 | | Yi Feng,
Zheng Zhou,
Dong Tong,
Xu Cheng:
Clock domain crossing fault model and coverage metric for validation of SoC design.
DATE 2007: 1385-1390 |
| 3 | | Yulai Zhao,
Xianfeng Li,
Dong Tong,
Xu Cheng:
Reuse Distance Based Cache Leakage Control.
HiPC 2007: 356-367 |
| 2 | | Yulai Zhao,
Xianfeng Li,
Dong Tong,
Xu Cheng:
An Energy-Efficient Instruction Scheduler Design with Two-Level Shelving and Adaptive Banking.
J. Comput. Sci. Technol. 22(1): 15-24 (2007) |
| 2005 |
|---|
| 1 | | Qiang Liu,
Dong Tong,
Xu Cheng:
Non-interleaving architecture for hardware implementation of modular multiplication.
ISCAS (1) 2005: 660-663 |
