Ching-Han Tsai

	2000
6		Ching-Han Tsai, Sung-Mo Kang: Fast temperature calculation for transient electrothermal simulation by mixed frequency/time domain thermal model reduction. DAC 2000: 750-755
5		Ching-Han Tsai, Sung-Mo Kang: Cell-level placement for improving substrate thermal distribution. IEEE Trans. on CAD of Integrated Circuits and Systems 19(2): 253-266 (2000)
	1999
4		Tong Li, Ching-Han Tsai, Elyse Rosenbaum, Sung-Mo Kang: Substrate Modeling and Lumped Substrate Resistance Extraction for CMOS ESD/Latchup Circuit Simulation. DAC 1999: 549-554
3		Ching-Han Tsai, Sung-Mo Kang: Macrocell placement with temperature profile optimization. ISCAS (6) 1999: 390-393
2		Ching-Han Tsai, Sung-Mo Kang: Standard cell placement for even on-chip thermal distribution. ISPD 1999: 179-184
	1998
1		Tong Li, Ching-Han Tsai, Sung-Mo Kang: Efficient transient electrothermal simulation of CMOS VLSI circuits under electrical overstress. ICCAD 1998: 6-11

Coauthor Index

1	Sung-Mo Kang	[1] [2] [3] [4] [5] [6]
2	Tong Li	[1] [4]
3	Elyse Rosenbaum	[4]