Jyh-Mou Tseng

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1999

1 Jyh-Mou Tseng, Jing-Yang Jou: Two-level logic minimization for low power. ACM Trans. Design Autom. Electr. Syst. 4(1): 52-69 (1999)

	1999
1		Jyh-Mou Tseng, Jing-Yang Jou: Two-level logic minimization for low power. ACM Trans. Design Autom. Electr. Syst. 4(1): 52-69 (1999)

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