 | 2009 |
|---|
| 5 |       | Yoshiki Saito,
Toru Sano,
Masaru Kato,
Vasutan Tunbunheng,
Yoshihiro Yasuda,
Hideharu Amano:
A Real Chip Evaluation of MuCCRA-3: A Low Power Dycamically Reconfigurable Processor Array.
ERSA 2009: 283-286 |
| 2008 |
|---|
| 4 |  | Takashi Nishimura,
Keiichiro Hirai,
Yoshiki Saito,
Takuro Nakamura,
Yohei Hasegawa,
Satoshi Tsutsusmi,
Vasutan Tunbunheng,
Hideharu Amano:
Power reduction techniques for Dynamically Reconfigurable Processor Arrays.
FPL 2008: 305-310 |
| 3 | | Vasutan Tunbunheng,
Hideharu Amano:
A Retargetable Compiler Based on Graph Representation for Dynamically Reconfigurable Processor Arrays.
IEICE Transactions 91-D(11): 2655-2665 (2008) |
| 2007 |
|---|
| 2 | | Vasutan Tunbunheng,
Masayasu Suzuki,
Hideharu Amano:
Data Multicasting Procedure for Increasing Configuration Speed of Coarse Grain Reconfigurable Devices.
IEICE Transactions 90-D(2): 473-481 (2007) |
| 2005 |
|---|
| 1 | | Vasutan Tunbunheng,
Masayasu Suzuki,
Hideharu Amano:
RoMultiC: Fast and Simple Configuration Data Multicasting Scheme for Coarse Grain Reconfigurable Devices.
FPT 2005: 129-136 |
