 | 2009 |
|---|
| 10 |       | Yifeng Qiu,
Wael M. Badawy,
Robert D. Turney:
An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation.
Signal Processing Systems 57(2): 123-137 (2009) |
| 2007 |
|---|
| 9 | | Yifeng Qiu,
Wael M. Badawy,
Robert D. Turney:
A Prototyping Co-design Platform with A Simplified Architecture for Video Codec Implementation.
ISCAS 2007: 1220-1224 |
| 8 | | Ihab Amer,
Wael M. Badawy,
Graham A. Jullien,
Marco Mattavelli,
Robert D. Turney:
A Simplified 8 × 8 Transformation and Quantization Real-Time IP-Block for MPEG-4 H.264/AVC Applications: a New Design Flow Approach.
Journal of Circuits, Systems, and Computers 16(6): 1011-1026 (2007) |
| 2005 |
|---|
| 7 |  | Kristof Denolf,
Adrian Chirila-Rus,
Robert D. Turney,
Paul R. Schumacher,
Kees A. Vissers:
Memory Efficient Design of an MPEG-4 Video Encoder for FPGAs.
FPL 2005: 391-396 |
| 6 | | Paul R. Schumacher,
Kristof Denolf,
Adrian Chirila-Rus,
Robert D. Turney,
Nick Fedele,
Kees A. Vissers,
Jan Bormans:
A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications.
ICIP (2) 2005: 886-889 |
| 5 | | Paul R. Schumacher,
Marco Mattavelli,
Adrian Chirila-Rus,
Robert D. Turney:
A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs.
ICME 2005: 872-875 |
| 4 | | Paul R. Schumacher,
Marco Mattavelli,
Adrian Chirila-Rus,
Robert D. Turney:
A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs.
IWSOC 2005: 30-33 |
| 3 | | T. Chiang,
Marco Mattavelli,
Robert D. Turney:
Introduction to the Special Issue on Integrated Multimedia Platforms.
IEEE Trans. Circuits Syst. Video Techn. 15(5): 589-592 (2005) |
| 2 | | Kristof Denolf,
Christophe De Vleeschouwer,
Robert D. Turney,
Gauthier Lafruit,
Jan Bormans:
Memory Centric Design of an MPEG-4 Video Encoder.
IEEE Trans. Circuits Syst. Video Techn. 15(5): 609-619 (2005) |
| 2003 |
|---|
| 1 | | Massimo Ravasi,
Marco Mattavelli,
Paul R. Schumacher,
Robert D. Turney:
High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder.
PATMOS 2003: 440-450 |
