Junhyung Um Coauthor index DBLP Vis pubzone.org

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13Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLWoo-Cheol Kwon, Sungjoo Yoo, Junhyung Um, Seh-Woong Jeong: In-network reorder buffer to improve overall NoC performance while resolving the in-order requirement problem. DATE 2009: 1058-1063
2006
12Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Woo-Cheol Kwon, Sungpack Hong, Young-Taek Kim, Kyu-Myung Choi, Jeong-Taek Kong, Soo-Kwan Eo, Taewhan Kim: A systematic IP and bus subsystem modeling for platform-based system design. DATE 2006: 560-564
11Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Taewhan Kim: Resource Sharing Combined with Layout Effects in High-Level Synthesis. VLSI Signal Processing 44(3): 231-243 (2006)
2003
10Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Taewhan Kim: Code Placement with Selective Cache Activity Minimization for Embedded Real-time Software Design. ICCAD 2003: 197-200
9Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Sangwoo Lee, Youngsoo Park, Sungik Jun, Thewhan KimU: An efficient inverse multiplier/divider architecture for cryptography systems. ISCAS (5) 2003: 149-152
8Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Taewhan Kim: Synthesis of arithmetic circuits considering layout effects. IEEE Trans. on CAD of Integrated Circuits and Systems 22(11): 1487-1503 (2003)
2002
7Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Taewhan Kim: Layout-aware synthesis of arithmetic circuits. DAC 2002: 207-212
6Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Jae-hoon Kim, Taewhan Kim: Layout-driven resource sharing in high-level synthesis. ICCAD 2002: 614-618
2001
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Taewhan Kim: An Optimal Allocation of Carry-Save-Adders in Arithmetic Circuits. IEEE Trans. Computers 50(3): 215-233 (2001)
2000
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTaewhan Kim, Junhyung Um: A timing-driven synthesis of arithmetic circuits using carry-save-adders (short paper). ASP-DAC 2000: 313-316
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Taewhan Kim, C. L. Liu: A fine-grained arithmetic optimization technique for high-performance/low-power data path synthesis. DAC 2000: 98-103
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLTaewhan Kim, Junhyung Um: A practical approach to the synthesis of arithmetic circuits usingcarry-save-adders. IEEE Trans. on CAD of Integrated Circuits and Systems 19(5): 615-624 (2000)
1999
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJunhyung Um, Taewhan Kim, C. L. Liu: Optimal allocation of carry-save-adders in arithmetic optimization. ICCAD 1999: 410-413

Coauthor Index

1Kyu-Myung Choi [12]
2Soo-Kwan Eo [12]
3Sungpack Hong [12]
4Seh-Woong Jeong [13]
5Sungik Jun [9]
6Jae-hoon Kim [6]
7Taewhan Kim [1] [2] [3] [4] [5] [6] [7] [8] [10] [11] [12]
8Young-Taek Kim [12]
9Thewhan KimU [9]
10Jeong-Taek Kong [12]
11Woo-Cheol Kwon [12] [13]
12Sangwoo Lee [9]
13C. L. Liu (Chung Laung (Dave) Liu) [1] [3]
14Youngsoo Park [9]
15Sungjoo Yoo [13]

Copyright © Mon Nov 16 17:22:42 2009 by Michael Ley (ley@uni-trier.de)