Ramachandran Vaidyanathan

	2008
43		Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan: Input-queued switches with logarithmic delay: necessary conditions and a reconfigurable scheduling algorithm. ANCS 2008: 121-122
42		Matthew Collin Jordan, Ramachandran Vaidyanathan: Configurable decoders with application in fast partial reconfiguration of FPGAs. FPGA 2008: 259
	2006
41		Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan: Routing Multiple Width Communications on the Circuit Switched Tree. Int. J. Found. Comput. Sci. 17(2): 271-286 (2006)
	2005
40		Ramachandran Vaidyanathan, Karthik Sethuraman: On Mapping Multidimensional Weak Tori on Optical Slab Waveguides. ICPP 2005: 219-226
39		Krishnendu Roy, Ramachandran Vaidyanathan, Jerry L. Trahan: Configuring the Circuit Switched Tree for Multiple Width Communications. IPDPS 2005
	2004
38		Hettihe P. Dharmasena, Ramachandran Vaidyanathan: Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms. IEEE Trans. Computers 53(12): 1535-1546 (2004)
37		Hettihe P. Dharmasena, Ramachandran Vaidyanathan: The Mesh With Binary Tree Networks: An Enhanced Mesh With Low Bus-Loading. Journal of Interconnection Networks 5(2): 131-150 (2004)
	2003
36		Nitin Srivastava, Jerry L. Trahan, Ramachandran Vaidyanathan, Suresh Rai: Adaptive Image Filtering Using Run-Time Reconfiguration. IPDPS 2003: 180
35		Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai: On Designing Implementable Algorithms for the Linear Reconfigurable Mesh. PDPTA 2003: 241-246
34		Hettihe P. Dharmasena, Ramachandran Vaidyanathan: Fault Tolerance in Multiple Bus Networks with Unbalanced Resource Utilization. PDPTA 2003: 247-254
33		Ramachandran Vaidyanathan, Jerry L. Trahan, Chun-ming Lu: Degree of scalability: scalable reconfigurable mesh algorithms for multiple addition and matrix-vector multiplication. Parallel Computing 29(1): 95-109 (2003)
	2002
32		Martin Feldman, Ahmed El-Amawy, Ramachandran Vaidyanathan: Free Space All-optical Crossconnect. IASTED PDCS 2002: 823-828
31		Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai: On the Communication Capability of the Self-Reconfigurable Gate Array Architecture. IPDPS 2002
30		Hatem M. El-Boghdadi, Ramachandran Vaidyanathan, Jerry L. Trahan, Suresh Rai: Reconfigurable Mesh on the Reconfigurable Tree Array. PDPTA 2002: 1068-1074
29		Jerry L. Trahan, Ramachandran Vaidyanathan: Scaling multiple addition and prefix sums on the reconfigurable mesh. Inf. Process. Lett. 82(6): 277-282 (2002)
28		José Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan: Using Bus Linearization to Scale the Reconfigurable Mesh. J. Parallel Distrib. Comput. 62(4): 495-516 (2002)
	2000
27		Jerry L. Trahan, Anu G. Bourgeois, Yi Pan, Ramachandran Vaidyanathan: Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses. J. Parallel Distrib. Comput. 60(9): 1125-1136 (2000)
	1999
26		Hettihe P. Dharmasena, Ramachandran Vaidyanathan: Lower Bounds on the Loading of Degree-2 Multiple Bus Networks for Binary-Tree Algorithms. IPPS/SPDP 1999: 21-25
25		Jerry L. Trahan, Anu G. Bourgeois, Ramachandran Vaidyanathan, Yi Pan: Optimally Scaling Permutation Routing on Reconfigurable Linear Arrays with Optical Buses. IPPS/SPDP 1999: 233-
24		José Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan: Improved Scaling Simulation of the General Reconfigurable Mesh. IPPS/SPDP Workshops 1999: 616-624
23		Martin Feldman, Ramachandran Vaidyanathan, Ahmed El-Amawy: High Speed, High Capacity Bused Interconnects using Optical Slab Waveguides. IPPS/SPDP Workshops 1999: 924-937
	1998
22		José Alberto Fernández-Zepeda, Ramachandran Vaidyanathan, Jerry L. Trahan: Scaling Simulation of the Fusing-Restricted Reconfigurable Mesh. IEEE Trans. Parallel Distrib. Syst. 9(9): 861-871 (1998)
21		Jerry L. Trahan, Anu G. Bourgeois, Ramachandran Vaidyanathan: Tighter and Broader Complexity Results for Reconfigurable Models. Parallel Processing Letters 8(3): 271-282 (1998)
	1997
20		Hettihe P. Dharmasena, Ramachandran Vaidyanathan: An Optimal Multiple Bus Network for Fan-in Algorithms. ICPP 1997: 100-
19		Hettihe P. Dharmasena, Ramachandran Vaidyanathan: An Optimal Multiple Bus Network for Fan-in Algorithms. ICPP 1997: 12-15
18		Yi Pan, Jerry L. Trahan, Ramachandran Vaidyanathan: A Scalable and Efficient Algorithm for Computing the City Block Distance Transform on Reconfigurable Meshes. Comput. J. 40(7): 435-440 (1997)
17		Jerry L. Trahan, Ramachandran Vaidyanathan, Chittur Subbaraman: Constant Time Graph Algorithms on the Reconfigurable Mutliple Buss Machine. J. Parallel Distrib. Comput. 46(1): 1-14 (1997)
	1996
16		Ramachandran Vaidyanathan, Sudharani Nadella: Fault-Tolerant Multiple Bus Networks for Fan-In Algorithms. IPPS 1996: 674-681
15		Jerry L. Trahan, Chun-ming Lu, Ramachandran Vaidyanathan: Integer and Floating Point Matrix-Vector Multiplication on the Reconfigurable Mesh. IPPS 1996: 702-706
14		Arshad Ali, Ramachandran Vaidyanathan: Exact Bounds on Running ASCEND/DESCEND and FAN-IN Algorithms on Synchronous Multiple Bus Networks. IEEE Trans. Parallel Distrib. Syst. 7(8): 783-790 (1996)
13		Omkar M. Dighe, Ramachandran Vaidyanathan, Si-Qing Zheng: The Bus-Connected Ringed Tree: A Versatile Interconnection Network. J. Parallel Distrib. Comput. 33(2): 189-196 (1996)
12		Jerry L. Trahan, Ramachandran Vaidyanathan, Ratnapuri K. Thiruchelvan: On the Power of Segmenting and Fusing Buses. J. Parallel Distrib. Comput. 34(1): 82-94 (1996)
	1995
11		Ramachandran Vaidyanathan, Carlos R. P. Hartmann, Pramod K. Varshney: Parallel Integer Sorting Using Small Operations Acta Inf. 32(1): 79-92 (1995)
10		Ramachandran Vaidyanathan, Anand Padmanabhan: Bus-Based Networks for Fan-In and Uniform Hypercube Algorithms. Parallel Computing 21(11): 1807-1821 (1995)
	1994
9		Jerry L. Trahan, Ramachandran Vaidyanathan, Chittur Subbaraman: Constant Time Graph and Poset Algorithms on the Reconfigurable Multiple Bus Machine. ICPP (3) 1994: 214-217
	1993
8		Omkar M. Dighe, Ramachandran Vaidyanathan, Si-Qing Zheng: Bus-Based Tree Structures for Efficient Parallel Computation. ICPP 1993: 158-161
7		Chittur Subbaraman, Jerry L. Trahan, Ramachandran Vaidyanathan: List Ranking and Graph Algorithms on the Reconfigurable Multiple Bus Machine. ICPP 1993: 244-247
6		Ramachandran Vaidyanathan, Carlos R. P. Hartmann, Pramod K. Varshney: Towards Optimal Parallel Radix Sorting. IPPS 1993: 193-197
5		Ratnapuri K. Thiruchelvan, Jerry L. Trahan, Ramachandran Vaidyanathan: On the Power of Segmenting and Fusing Buses. IPPS 1993: 79-83
4		Ramachandran Vaidyanathan, Carlos R. P. Hartmann, Pramod K. Varshney: Running ASCEND, DESCEND and PIPELINE Algorithms in Parallel Using Small Processors. Inf. Process. Lett. 46(1): 31-36 (1993)
3		Ramachandran Vaidyanathan, Jerry L. Trahan: Optimal Simulation of Multidimensional Reconfigurable Meshes by Two-Dimensional Reconfigurable Meshes. Inf. Process. Lett. 47(5): 267-273 (1993)
	1992
2		Ramachandran Vaidyanathan: Sorting on PRAMs with Reconfigurable Buses. Inf. Process. Lett. 42(4): 203-208 (1992)
1		Ramachandran Vaidyanathan, Carlos R. P. Hartmann, Pramod K. Varshney: PRAMs with Variable Word-Size. Inf. Process. Lett. 42(4): 217-222 (1992)

Coauthor Index

1	Arshad Ali	[14]
2	Anu G. Bourgeois	[21] [25] [27]
3	Hettihe P. Dharmasena	[19] [20] [26] [34] [37] [38]
4	Omkar M. Dighe	[8] [13]
5	Ahmed El-Amawy	[23] [32]
6	Hatem M. El-Boghdadi	[30] [31] [35]
7	Martin Feldman	[23] [32]
8	José Alberto Fernández-Zepeda	[22] [24] [28]
9	Carlos R. P. Hartmann	[1] [4] [6] [11]
10	Matthew Collin Jordan	[42]
11	Chun-ming Lu	[15] [33]
12	Sudharani Nadella	[16]
13	Anand Padmanabhan	[10]
14	Yi Pan	[18] [25] [27]
15	Suresh Rai	[30] [31] [35] [36]
16	Krishnendu Roy	[39] [41] [43]
17	Karthik Sethuraman	[40]
18	Nitin Srivastava	[36]
19	Chittur Subbaraman	[7] [9] [17]
20	Ratnapuri K. Thiruchelvan	[5] [12]
21	Jerry L. Trahan	[3] [5] [7] [9] [12] [15] [17] [18] [21] [22] [24] [25] [27] [28] [29] [30] [31] [33] [35] [36] [39] [41] [43]
22	Pramod K. Varshney	[1] [4] [6] [11]
23	Si-Qing Zheng (S. Q. Zheng)	[8] [13]

Colors in the list of coauthors