 | 2009 |
|---|
| 9 |       | S. Ramasamy,
B. Venkataramani,
R. Niranjini,
K. Suganya:
100KHz-20MHz Programmable Subthreshold Gm-C Low-Pass Filter in 0.18µ-m CMOS.
VLSI Design 2009: 105-110 |
| 8 | | J. Manikandan,
B. Venkataramani,
V. Avanthi:
FPGA Implementation of Support Vector Machine Based Isolated Digit Recognition System.
VLSI Design 2009: 347-352 |
| 7 | | V. Vireen,
N. Venugopalachary,
G. Seetharaman,
B. Venkataramani:
Built in Self Test Based Design of Wave-Pipelined Circuits in ASICs.
VLSI Design 2009: 473-478 |
| 6 | | V. Amudha,
B. Venkataramani,
R. Vinoth Kumar,
S. Ravishankar:
Software/Hardware Co-design of HMM Based Speaker Independent Isolated Digit Recognition System.
JCP 4(2): 154-159 (2009) |
| 5 | | G. Seetharaman,
B. Venkataramani:
Automation Schemes for FPGA Implementation of Wave-Pipelined Circuits.
TRETS 2(2): (2009) |
| 2008 |
|---|
| 4 | | S. Ramasamy,
B. Venkataramani,
K. Anbugeetha:
VLSI Implementation of a Digitally Tunable Gm-C Filter with Double CMOS Pair.
VLSI Design 2008: 317-322 |
| 2007 |
|---|
| 3 | | V. Amudha,
B. Venkataramani,
R. Vinoth Kumar,
S. Ravishankar:
SOC Implementation of HMM Based Speaker Independent Isolated Digit Recognition System.
VLSI Design 2007: 848-853 |
| 2005 |
|---|
| 2 | | G. Lakshminarayanan,
B. Venkataramani:
Optimization Techniques for FPGA-Based Wave-Pipelined DSP Blocks.
IEEE Trans. VLSI Syst. 13(7): 783-793 (2005) |
| 1997 |
|---|
| 1 | | B. Venkataramani,
Sanjay K. Bose,
K. R. Srivathsan:
Queuing analysis of a non-pre-emptive MMPP/D/1 priority system.
Computer Communications 20(11): 999-1018 (1997) |
