Vishak Venkatraman Coauthor index DBLP Vis pubzone.org

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DBLP keys2005
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVishak Venkatraman, Wayne Burleson: Robust Multi-Level Current-Mode On-Chip Interconnect Signaling in the Presence of Process Variations. ISQED 2005: 522-527
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVishak Venkatraman, Wayne Burleson: Impact of Process Variations on Multi-Level Signaling for On-Chip Interconnects. VLSI Design 2005: 362-367
2004
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVishak Venkatraman, Atul Maheshwari, Wayne Burleson: Mitigating static power in current-sensed interconnects. ACM Great Lakes Symposium on VLSI 2004: 224-229
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVishak Venkatraman, Andrew Laffely, Jinwook Jang, Hempraveen Kukkamalla, Zhi Zhu, Wayne Burleson: NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods. SLIP 2004: 69-75

Coauthor Index

1Wayne P. Burleson (Wayne Burleson) [1] [2] [3] [4]
2Jinwook Jang [1]
3Hempraveen Kukkamalla [1]
4Andrew Laffely [1]
5Atul Maheshwari [2]
6Zhi Zhu [1]

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