| 2002 | ||
|---|---|---|
| 7 | R. Venugopal, Ravindra B. Keskar: Compiling Safe Mobile Code. The Compiler Design Handbook 2002: 763-800 | |
| 6 | R. Venugopal, Y. N. Srikant: Scheduling expression trees for delayed-load architectures. Journal of Systems Architecture 48(4-5): 151-173 (2002) | |
| 2001 | ||
| 5 | Anil Seth, Ravindra B. Keskar, R. Venugopal: Algorithms for energy optimization using processor instructions. CASES 2001: 195-202 | |
| 1998 | ||
| 4 | R. Venugopal, Y. N. Srikant: An incremental basic block instruction scheduler. Journal of Systems Architecture 45(3): 179-203 (1998) | |
| 1995 | ||
| 3 | R. Venugopal, Y. N. Srikant: Scheduling Expression Trees with Reusable Registers on Delayed-Load Architectures. Comput. Lang. 21(1): 49-65 (1995) | |
| 1994 | ||
| 2 | R. Venugopal, Y. N. Srikant: Scheduliing expression trees with register variables on delayed-load architectures. Microprocessing and Microprogramming 40(8): 577-596 (1994) | |
| 1993 | ||
| 1 | R. Venugopal, Y. N. Srikant: Heuristic Chaining in Directed Acyclic Graphs. Comput. Lang. 19(3): 169-184 (1993) | |
| 1 | Ravindra B. Keskar | [5] [7] |
| 2 | Anil Seth | [5] |
| 3 | Y. N. Srikant | [1] [2] [3] [4] [6] |