| 2009 | ||
|---|---|---|
| 119 | Junfeng Fan, Frederik Vercauteren, Ingrid Verbauwhede: Faster -Arithmetic for Cryptographic Pairings on Barreto-Naehrig Curves. CHES 2009: 240-253 | |
| 118 | Xu Guo, Junfeng Fan, Patrick Schaumont, Ingrid Verbauwhede: Programmable and Parallel ECC Coprocessor Architecture: Tradeoffs between Area, Speed and Security. CHES 2009: 289-303 | |
| 117 | Roel Maes, Pim Tuyls, Ingrid Verbauwhede: Low-Overhead Implementation of a Soft Decision Helper Data Algorithm for SRAM PUFs. CHES 2009: 332-347 | |
| 116 | Elke De Mulder, Wim Aerts, Bart Preneel, Ingrid Verbauwhede, Guy Vandenbosch: Case Study : A class E power amplifier for ISO-14443A. DDECS 2009: 20-23 | |
| 115 | Bart Coppens, Ingrid Verbauwhede, Koen De Bosschere, Bjorn De Sutter: Practical Mitigations for Timing-Based Side-Channel Attacks on Modern x86 Processors. IEEE Symposium on Security and Privacy 2009: 45-60 | |
| 114 | Miroslav Knezevic, Ingrid Verbauwhede: Hardware evaluation of the Luffa hash family. WESS 2009 | |
| 2008 | ||
| 113 | Ali Can Atici, Lejla Batina, Junfeng Fan, Ingrid Verbauwhede, Siddika Berna Örs: Low-cost implementations of NTRU for pervasive security. ASAP 2008: 79-84 | |
| 112 | Miroslav Knezevic, Kazuo Sakiyama, Yong Ki Lee, Ingrid Verbauwhede: On the high-throughput implementation of RIPEMD-160 hash algorithm. ASAP 2008: 85-90 | |
| 111 | Nele Mentens, Benedikt Gierlichs, Ingrid Verbauwhede: Power and Fault Analysis Resistance in Hardware through Dynamic Reconfiguration. CHES 2008: 346-362 | |
| 110 | Christophe Clavier, Benedikt Gierlichs, Ingrid Verbauwhede: Fault Analysis Study of IDEA. CT-RSA 2008: 274-287 | |
| 109 | Junfeng Fan, Lejla Batina, Kazuo Sakiyama, Ingrid Verbauwhede: FPGA Design for Algebraic Tori-Based Public-Key Cryptography. DATE 2008: 1292-1297 | |
| 108 | Leif Uhsadel, Andy Georges, Ingrid Verbauwhede: Exploiting Hardware Performance Counters. FDTC 2008: 59-67 | |
| 107 | Junfeng Fan, Ingrid Verbauwhede: Unified Digit-Serial Multiplier and Inverter in Finite Field GF(2m). HOST 2008: 72-75 | |
| 106 | François-Xavier Standaert, Benedikt Gierlichs, Ingrid Verbauwhede: Partition vs. Comparison Side-Channel Distinguishers: An Empirical Evaluation of Statistical Tests for Univariate Side-Channel Attacks against Two Unprotected CMOS Devices. ICISC 2008: 253-267 | |
| 105 | Carmela Troncoso, Benedikt Gierlichs, Bart Preneel, Ingrid Verbauwhede: Perfect Matching Disclosure Attacks. Privacy Enhancing Technologies 2008: 2-23 | |
| 104 | Junfeng Fan, Ingrid Verbauwhede: A digit-serial architecture for inversion and multiplication in GF(2M). SiPS 2008: 7-12 | |
| 103 | Miroslav Knezevic, Kazuo Sakiyama, Junfeng Fan, Ingrid Verbauwhede: Modular Reduction in GF(2n) without Pre-computational Phase. WAIFI 2008: 77-87 | |
| 102 | Miroslav Knezevic, Vesselin Velichkov, Bart Preneel, Ingrid Verbauwhede: On the Practical Performance of Rateless Codes. WINSYS 2008: 173-176 | |
| 101 | Benedikt Gierlichs, Carmela Troncoso, Claudia Díaz, Bart Preneel, Ingrid Verbauwhede: Revisiting a combinatorial approach toward measuring anonymity. WPES 2008: 111-116 | |
| 100 | Yong Ki Lee, Kazuo Sakiyama, Lejla Batina, Ingrid Verbauwhede: Elliptic-Curve-Based Security Processor for RFID. IEEE Trans. Computers 57(11): 1514-1527 (2008) | |
| 99 | Jongsun Kim, Bo-Cheng Lai, Mau-Chung Frank Chang, Ingrid Verbauwhede: A Cost-Effective Latency-Aware Memory Bus for Symmetric Multiprocessor Systems. IEEE Trans. Computers 57(12): 1714-1719 (2008) | |
| 98 | Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede: Design Methodology for Throughput Optimum Architectures of Hash Algorithms of the MD4-class. Signal Processing Systems 53(1-2): 89-102 (2008) | |
| 2007 | ||
| 97 | Pascal Paillier, Ingrid Verbauwhede: Cryptographic Hardware and Embedded Systems - CHES 2007, 9th International Workshop, Vienna, Austria, September 10-13, 2007, Proceedings Springer 2007 | |
| 96 | Kazuo Sakiyama, Elke De Mulder, Bart Preneel, Ingrid Verbauwhede: Side-channel resistant system-level design flow for public-key cryptography. ACM Great Lakes Symposium on VLSI 2007: 144-147 | |
| 95 | Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede: Efficient pipelining for modular multiplication architectures in prime fields. ACM Great Lakes Symposium on VLSI 2007: 534-539 | |
| 94 | Ingrid Verbauwhede, Patrick Schaumont: Design methods for security and trust. DATE 2007: 672-677 | |
| 93 | Nele Mentens, Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede: A Side-channel Attack Resistant Programmable PKC Coprocessor for Embedded Applications. ICSAMOS 2007: 194-200 | |
| 92 | Lejla Batina, Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede: Public-Key Cryptography on the Top of a Needle. ISCAS 2007: 1831-1834 | |
| 91 | Lejla Batina, Jorge Guajardo, Tim Kerins, Nele Mentens, Pim Tuyls, Ingrid Verbauwhede: Public-Key Cryptography for RFID-Tags. PerCom Workshops 2007: 217-222 | |
| 90 | Junfeng Fan, Kazuo Sakiyama, Ingrid Verbauwhede: Montgomery Modular Multiplication Algorithm on Multi-Core Systems. SiPS 2007: 261-266 | |
| 89 | Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede: Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations. WISA 2007: 102-114 | |
| 88 | Yong Ki Lee, Ingrid Verbauwhede: A Compact Architecture for Montgomery Elliptic Curve Scalar Multiplication Processor. WISA 2007: 115-127 | |
| 87 | Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo: Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip CoRR abs/0710.4646: (2007) | |
| 86 | Kris Tiri, Ingrid Verbauwhede: Design Method for Constant Power Consumption of Differential Logic Circuits CoRR abs/0710.4756: (2007) | |
| 85 | Kris Tiri, Ingrid Verbauwhede: A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs CoRR abs/0710.4806: (2007) | |
| 84 | Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede: HW/SW co-design for public-key cryptosystems on the 8051 micro-controller. Computers & Electrical Engineering 33(5-6): 324-332 (2007) | |
| 83 | Elke De Mulder, Siddika Berna Örs, Bart Preneel, Ingrid Verbauwhede: Differential power and electromagnetic attacks on a FPGA implementation of elliptic curve cryptosystems. Computers & Electrical Engineering 33(5-6): 367-382 (2007) | |
| 82 | Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede: Multicore Curve-Based Cryptoprocessor with Reconfigurable Modular Arithmetic Logic Units over GF(2n). IEEE Trans. Computers 56(9): 1269-1282 (2007) | |
| 81 | Jongsun Kim, Ingrid Verbauwhede, M.-C. Frank Chang: Design of an Interconnect Architecture and Signaling Technology for Parallelism in Communication. IEEE Trans. VLSI Syst. 15(8): 881-894 (2007) | |
| 80 | Alireza Hodjat, Lejla Batina, David Hwang, Ingrid Verbauwhede: HW/SW co-design of a hyperelliptic curve cryptosystem using a microcode instruction set coprocessor. Integration 40(1): 45-51 (2007) | |
| 79 | Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede: High-performance Public-key Cryptoprocessor for Wireless Mobile Applications. MONET 12(4): 245-258 (2007) | |
| 2006 | ||
| 78 | Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede: Time-Memory Trade-Off Attack on FPGA Platforms: UNIX Password Cracking. ARC 2006: 323-334 | |
| 77 | Kazuo Sakiyama, Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede: Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems. ARC 2006: 347-357 | |
| 76 | Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, Ingrid Verbauwhede: Cross Layer Design to Multi-thread a Data-Pipelining Application on a Multi-processor on Chip. ASAP 2006: 15-18 | |
| 75 | Herwin Chan, Miguel Griot, Andres I. Vila Casado, Richard D. Wesel, Ingrid Verbauwhede: High Speed Channel Coding Architectures for the Uncoordinated OR Channel. ASAP 2006: 265-268 | |
| 74 | Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede: Throughput Optimized SHA-1 Architecture Using Unfolding Transformation. ASAP 2006: 354-359 | |
| 73 | Kazuo Sakiyama, Lejla Batina, Bart Preneel, Ingrid Verbauwhede: Superscalar Coprocessor for High-Speed Curve-Based Cryptography. CHES 2006: 415-429 | |
| 72 | Patrick Schaumont, Sandeep K. Shukla, Ingrid Verbauwhede: Design with race-free hardware semantics. DATE 2006: 571-576 | |
| 71 | Herwin Chan, Patrick Schaumont, Ingrid Verbauwhede: Process Isolation for Reconfigurable Hardware. ERSA 2006: 164-170 | |
| 70 | Lejla Batina, Nele Mentens, Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede: Low-Cost Elliptic Curve Cryptography for Wireless Sensor Networks. ESAS 2006: 6-17 | |
| 69 | Lejla Batina, Alireza Hodjat, David Hwang, Kazuo Sakiyama, Ingrid Verbauwhede: Reconfigurable Architectures for Curve-Based Cryptography on Embedded Micro-Controllers. FPL 2006: 1-4 | |
| 68 | Dries Schellekens, Bart Preneel, Ingrid Verbauwhede: FPGA Vendor Agnostic True Random Number Generator. FPL 2006: 1-6 | |
| 67 | Nele Mentens, Kazuo Sakiyama, Lejla Batina, Ingrid Verbauwhede, Bart Preneel: Fpga-Oriented Secure Data Path Design: Implementation of a Public Key Coprocessor. FPL 2006: 1-6 | |
| 66 | Kazuo Sakiyama, Bart Preneel, Ingrid Verbauwhede: A fast dual-field modular arithmetic logic unit and its hardware implementation. ISCAS 2006 | |
| 65 | Lejla Batina, Nele Mentens, Bart Preneel, Ingrid Verbauwhede: Flexible hardware architectures for curve-based cryptography. ISCAS 2006 | |
| 64 | Kris Tiri, Patrick Schaumont, Ingrid Verbauwhede: Side-Channel Leakage Tolerant Architectures. ITNG 2006: 204-209 | |
| 63 | Patrick Schaumont, Doris Ching, Ingrid Verbauwhede: An interactive codesign environment for domain-specific coprocessors. ACM Trans. Design Autom. Electr. Syst. 11(1): 70-87 (2006) | |
| 62 | Patrick Schaumont, Ingrid Verbauwhede: A Component-Based Design Environment for ESL Design. IEEE Design & Test of Computers 23(5): 338-347 (2006) | |
| 61 | David Hwang, Patrick Schaumont, Kris Tiri, Ingrid Verbauwhede: Securing Embedded Systems. IEEE Security & Privacy 4(2): 40-49 (2006) | |
| 60 | Patrick Schaumont, David Hwang, Shenglin Yang, Ingrid Verbauwhede: Multilevel Design Validation in a Secure Embedded System. IEEE Trans. Computers 55(11): 1380-1390 (2006) | |
| 59 | Alireza Hodjat, Ingrid Verbauwhede: Area-Throughput Trade-Offs for Fully Pipelined 30 to 70 Gbits/s AES Processors. IEEE Trans. Computers 55(4): 366-372 (2006) | |
| 58 | Mustafa Badaroglu, Kris Tiri, Geert Van der Plas, Piet Wambacq, Ingrid Verbauwhede, Stéphane Donnay, Georges G. E. Gielen, Hugo De Man: Clock-skew-optimization methodology for substrate-noise reduction with supply-current folding. IEEE Trans. on CAD of Integrated Circuits and Systems 25(6): 1146-1154 (2006) | |
| 57 | Kris Tiri, Ingrid Verbauwhede: A digital design flow for secure integrated circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 25(7): 1197-1208 (2006) | |
| 2005 | ||
| 56 | Alireza Hodjat, David Hwang, Bo-Cheng Lai, Kris Tiri, Ingrid Verbauwhede: A 3.84 gbits/s AES crypto coprocessor with modes of operation in a 0.18-µm CMOS technology. ACM Great Lakes Symposium on VLSI 2005: 60-63 | |
| 55 | Lejla Batina, Nele Mentens, Bart Preneel, Ingrid Verbauwhede: Side-channel aware design: Algorithms and Architectures for Elliptic Curve Cryptography over GF(2n). ASAP 2005: 350-355 | |
| 54 | Lejla Batina, David Hwang, Alireza Hodjat, Bart Preneel, Ingrid Verbauwhede: Hardware/Software Co-design for Hyperelliptic Curve Cryptography (HECC) on the 8051µP. CHES 2005: 106-118 | |
| 53 | Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede: Prototype IC with WDDL and Differential Routing - DPA Resistance Assessment. CHES 2005: 354-365 | |
| 52 | Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede: Microcoded coprocessor for embedded secure biometric authentication systems. CODES+ISSS 2005: 130-135 | |
| 51 | Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede: A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box. CT-RSA 2005: 323-333 | |
| 50 | Kris Tiri, David Hwang, Alireza Hodjat, Bo-Cheng Lai, Shenglin Yang, Patrick Schaumont, Ingrid Verbauwhede: A side-channel leakage free coprocessor IC in 0.18µm CMOS for embedded AES-based cryptographic and biometric processing. DAC 2005: 222-227 | |
| 49 | Kris Tiri, Ingrid Verbauwhede: Simulation models for side-channel information leaks. DAC 2005: 228-233 | |
| 48 | Patrick Schaumont, Bo-Cheng Charles Lai, Wei Qin, Ingrid Verbauwhede: Cooperative multithreading on 3mbedded multiprocessor architectures enables energy-scalable design. DAC 2005: 27-30 | |
| 47 | Kris Tiri, Ingrid Verbauwhede: A VLSI Design Flow for Secure Side-Channel Attack Resistant ICs. DATE 2005: 58-63 | |
| 46 | Kris Tiri, Ingrid Verbauwhede: Design Method for Constant Power Consumption of Differential Logic Circuits. DATE 2005: 628-633 | |
| 45 | Oreste Villa, Patrick Schaumont, Ingrid Verbauwhede, Matteo Monchiero, Gianluca Palermo: Fast Dynamic Memory Integration in Co-Simulation Frameworks for Multiprocessor System on-Chip. DATE 2005: 804-805 | |
| 44 | Bo-Cheng Charles Lai, Patrick Schaumont, Wei Qin, Ingrid Verbauwhede: Energy and Performance Analysis of Mapping Parallel Multithreaded Tasks for An On-Chip Multi-Processor System. ICCD 2005: 102-104 | |
| 43 | Lejla Batina, Nele Mentens, Ingrid Verbauwhede: Side-Channel Issues for Designing Secure Hardware Implementations. IOLTS 2005: 118-121 | |
| 42 | Alireza Hodjat, David Hwang, Ingrid Verbauwhede: A Scalable and High Performance Elliptic Curve Processor with Resistance to Timing Attacks. ITCC (1) 2005: 538-543 | |
| 41 | Patrick Schaumont, Sandeep K. Shukla, Ingrid Verbauwhede: Extended abstract: a race-free hardware modeling language. MEMOCODE 2005: 255-256 | |
| 40 | Ingrid Verbauwhede, Patrick Schaumont: Skiing the embedded systems mountain. ACM Trans. Embedded Comput. Syst. 4(3): 529-548 (2005) | |
| 39 | Patrick Schaumont, David Hwang, Ingrid Verbauwhede: Platform-based design for an embedded-fingerprint-authentication device. IEEE Trans. on CAD of Integrated Circuits and Systems 24(12): 1929-1936 (2005) | |
| 38 | Doris Ching, Patrick Schaumont, Ingrid Verbauwhede: Integrated modelling and generation of a reconfigurable network-on-chip. IJES 1(3/4): 218-227 (2005) | |
| 2004 | ||
| 37 | David Hwang, Bo-Cheng Lai, Ingrid Verbauwhede: Energy-Memory-Security Tradeoffs in Distributed Sensor Networks. ADHOC-NOW 2004: 70-81 | |
| 36 | Kris Tiri, Ingrid Verbauwhede: Place and Route for Secure Standard Cell Design. CARDIS 2004: 143-158 | |
| 35 | Yusuke Matsuoka, Patrick Schaumont, Kris Tiri, Ingrid Verbauwhede: Java cryptography on KVM and its performance and security optimization using HW/SW co-design techniques. CASES 2004: 303-311 | |
| 34 | Ingrid Verbauwhede, Patrick Schaumont: The happy marriage of architecture and application in next-generation reconfigurable systems. Conf. Computing Frontiers 2004: 363-376 | |
| 33 | Kris Tiri, Ingrid Verbauwhede: A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation. DATE 2004: 246-251 | |
| 32 | Patrick Schaumont, Ingrid Verbauwhede: Interactive Cosimulation with Partial Evaluation. DATE 2004: 642-647 | |
| 31 | Ingrid Verbauwhede, Patrick Schaumont, Christian Piguet, Bart Kienhuis: Architectures and Design Techniques for Energy Efficient Embedded DSP and Multimedia Processing. DATE 2004: 988-995 | |
| 30 | Alireza Hodjat, Ingrid Verbauwhede: A 21.54 Gbits/s Fully Pipelined AES Processor on FPGA. FCCM 2004: 308-309 | |
| 29 | Kris Tiri, Ingrid Verbauwhede: Secure Logic Synthesis. FPL 2004: 1052-1056 | |
| 28 | Patrick Schaumont, Kazuo Sakiyama, Alireza Hodjat, Ingrid Verbauwhede: Embedded Software Integration for Coarse-Grain Reconfigurable Systems. IPDPS 2004 | |
| 27 | Doris Ching, Patrick Schaumont, Ingrid Verbauwhede: Integrated Modeling and Generation of a Reconfigurable Network-on-Chip. IPDPS 2004 | |
| 26 | Bo-Cheng Lai, David Hwang, Sungha Pete Kim, Ingrid Verbauwhede: Reducing radio energy consumption of key management protocols for wireless sensor networks. ISLPED 2004: 351-356 | |
| 25 | Alireza Hodjat, Ingrid Verbauwhede: Minimum Area Cost for a 30 to 70 Gbits/s AES Processor. ISVLSI 2004: 83-88 | |
| 24 | Alireza Hodjat, Patrick Schaumont, Ingrid Verbauwhede: Architectural Design Features of a Programmable High Throughput AES Coprocessor. ITCC (2) 2004: 498-502 | |
| 23 | Herwin Chan, Alireza Hodjat, Jun Shi, Richard D. Wesel, Ingrid Verbauwhede: Streaming Encryption for a Secure Wavelength and Time Domain Hopped Optical Network. ITCC (2) 2004: 578-582 | |
| 22 | Alireza Hodjat, Ingrid Verbauwhede: High-Throughput Programmable Cryptocoprocessor. IEEE Micro 24(3): 34-45 (2004) | |
| 2003 | ||
| 21 | Ingrid Verbauwhede, Hyung Roh: Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003 ACM 2003 | |
| 20 | Kris Tiri, Ingrid Verbauwhede: Securing Encryption Algorithms against DPA at the Logic Level: Next Generation Smart Card Technology. CHES 2003: 125-136 | |
| 19 | David Hwang, Bo-Cheng Lai, Patrick Schaumont, Kazuo Sakiyama, Yi Fan, Shenglin Yang, Alireza Hodjat, Ingrid Verbauwhede: Design flow for HW / SW acceleration transparency in the thumbpod secure embedded system. DAC 2003: 60-65 | |
| 18 | Kazuo Sakiyama, Patrick Schaumont, David Hwang, Ingrid Verbauwhede: Teaching Trade-offs in System-level Design Methodologies. MSE 2003: 62-53 | |
| 17 | Patrick Schaumont, Ingrid Verbauwhede: Domain-Specific Codesign for Embedded Security. IEEE Computer 36(4): 68-74 (2003) | |
| 2002 | ||
| 16 | Vivek De, Mary Jane Irwin, Ingrid Verbauwhede, Christian Piguet: Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002, Monterey, California, USA, August 12-14, 2002 ACM 2002 | |
| 15 | David Hwang, Bo-Cheng Lai, Patrick Schaumont, Ingrid Verbauwhede: A Security Protocol for Biometric Smart Cards. CARDIS 2002 | |
| 14 | Mustafa Badaroglu, Kris Tiri, Stéphane Donnay, Piet Wambacq, Hugo De Man, Ingrid Verbauwhede, Georges G. E. Gielen: Clock tree optimization in synchronous CMOS digital circuits for substrate noise reduction using folding of supply current transients. DAC 2002: 399-404 | |
| 13 | Patrick Schaumont, Henry Kuo, Ingrid Verbauwhede: Unlocking the design secrets of a 2.29 Gb/s Rijndael processor. DAC 2002: 634-639 | |
| 12 | Ingrid Verbauwhede, M.-C. Frank Chang: Reconfigurable interconnect for next generation systems. SLIP 2002: 71-74 | |
| 11 | Enrico Macii, Ingrid Verbauwhede: Guest editorial: low-power electronics and design. IEEE Trans. VLSI Syst. 10(2): 69-70 (2002) | |
| 2001 | ||
| 10 | Henry Kuo, Ingrid Verbauwhede: Architectural Optimization for a 1.82Gbits/sec VLSI Implementation of the AES Rijndael Algorithm. CHES 2001: 51-64 | |
| 9 | Patrick Schaumont, Ingrid Verbauwhede, Kurt Keutzer, Majid Sarrafzadeh: A Quick Safari Through the Reconfiguration Jungle. DAC 2001: 172-177 | |
| 8 | Rajesh K. Gupta, Shishpal Rawat, Ingrid Verbauwhede, Gérard Berry, Ramesh Chandra, Daniel Gajski, Kris Konigsfeld, Patrick Schaumont: Panel: The Next HDL: If C++ is the Answer, What was the Question? DAC 2001: 71-72 | |
| 2000 | ||
| 7 | Ingrid Verbauwhede, Chris Nicol: Low power DSP's for wireless communications (embedded tutorial session). ISLPED 2000: 303-310 | |
| 1998 | ||
| 6 | Ingrid Verbauwhede, Mihran Touriguian: A Low Power DSP Engine for Wireless Communications. VLSI Signal Processing 18(2): 177-186 (1998) | |
| 1995 | ||
| 5 | Ingrid Verbauwhede, Jan M. Rabaey: Guest editor's introduction design environments for DSP. VLSI Signal Processing 9(1-2): 5-6 (1995) | |
| 4 | Ingrid Verbauwhede, Jan M. Rabaey: Synthesis for real time systems: Solutions and challenges. VLSI Signal Processing 9(1-2): 67-88 (1995) | |
| 1994 | ||
| 3 | Ingrid Verbauwhede, Chris J. Scheers, Jan M. Rabaey: Memory Estimation for High Level Synthesis. DAC 1994: 143-148 | |
| 1991 | ||
| 2 | Ingrid Verbauwhede, Francky Catthoor, Joos Vandewalle, Hugo De Man: In-place memory management of algebraic algorithms on application specific ICs. VLSI Signal Processing 3(3): 193-200 (1991) | |
| 1987 | ||
| 1 | Ingrid Verbauwhede, Frank Hoornaert, Joos Vandewalle, Hugo De Man: Security Considerations in the Design and Implementation of a new DES chip. EUROCRYPT 1987: 287-300 | |