 | 2008 |
|---|
| 7 |       | Pablo Viana,
Ann Gordon-Ross,
Edna Barros,
Frank Vahid:
A table-based method for single-pass cache optimization.
ACM Great Lakes Symposium on VLSI 2008: 71-76 |
| 2007 |
|---|
| 6 | | Ann Gordon-Ross,
Pablo Viana,
Frank Vahid,
Walid A. Najjar,
Edna Barros:
A one-shot configurable-cache tuner for improved energy and performance.
DATE 2007: 755-760 |
| 5 | | Andre Silva,
Guilherme Esmeraldo,
Edna Barros,
Pablo Viana:
Cache-Analyzer: Design Space Evaluation of Configurable-Caches in a Single-Pass.
IEEE International Workshop on Rapid System Prototyping 2007: 3-9 |
| 2006 |
|---|
| 4 | | Pablo Viana,
Ann Gordon-Ross,
Eamonn J. Keogh,
Edna Barros,
Frank Vahid:
Configurable cache subsetting for fast cache tuning.
DAC 2006: 695-700 |
| 3 | | Abel Guilhermino S. Filho,
Pablo Viana,
Edna Barros,
Manoel Eusebio de Lima:
Tuning Mechanism for Two-Level Cache Hierarchy Intended for Instruction Caches and Low Energy Consumption.
SBAC-PAD 2006: 125-132 |
| 2004 |
|---|
| 2 | | Pablo Viana,
Edna Barros,
Sandro Rigo,
Rodolfo Azevedo,
Guido Araujo:
Modeling and Simulating Memory Hierarchies in a Platform-Based Design Methodology.
DATE 2004: 734-735 |
| 2003 |
|---|
| 1 | | Pablo Viana,
Edna Barros,
Sandro Rigo,
Rodolfo Azevedo,
Guido Araujo:
Exploring Memory Hierarchy with ArchC.
SBAC-PAD 2003: 2-9 |
