A. Prasad Vinod

	2009
34		Kavallur Gopi Smitha, A. Prasad Vinod: A Low Power Reconfigurable Channel Filter Using Multi-Band and Masking Architecture for Channel Adaptation in Cognitive Radio. IEICE Transactions 92-A(6): 1424-1432 (2009)
	2008
33		Kavallur Gopi Smitha, A. Prasad Vinod: A reconfigurable low complexity architecture for channel adaptation in cognitive radio. PIMRC 2008: 1-5
32		Navin Michael, A. Prasad Vinod: Reconfigurable architecture for arbitrary sample rate conversion in software defined radios. PIMRC 2008: 1-6
31		R. Mahesh, A. Prasad Vinod: A New Common Subexpression Elimination Algorithm for Realizing Low-Complexity Higher Order Digital Filters. IEEE Trans. on CAD of Integrated Circuits and Systems 27(2): 217-229 (2008)
30		Kavallur Gopi Smitha, A. Prasad Vinod: Low Power Realization and Synthesis of Higher-Order FIR Filters Using an Improved Common Subexpression Elimination Method. IEICE Transactions 91-A(11): 3282-3292 (2008)
29		Jimson Mathew, R. Mahesh, A. Prasad Vinod, Edmund Ming-Kit Lai: Realization of Low Power High-Speed Channel Filters with Stringent Adjacent Channel Attenuation Specifications for Wireless Communication Receivers. IEICE Transactions 91-A(9): 2564-2570 (2008)
	2007
28		Himanshu Thapliyal, A. Prasad Vinod: Designing Efficient Online Testable Reversible Adders With New Reversible Gate. ISCAS 2007: 1085-1088
27		Kavallur Gopi Smitha, A. Prasad Vinod: A New Binary Common Subexpression Elimination Method for Implementing Low Complexity FIR Filters. ISCAS 2007: 2327-2330
26		R. Mahesh, A. Prasad Vinod: An Architecture For Integrating Low Complexity and Reconfigurability for Channel filters in Software Defined Radio Receivers. ISCAS 2007: 2514-2517
25		R. Mahesh, A. Prasad Vinod: Frequency Response Masking based Reconfigurable Channel Filters for Software Radio Receivers. ISCAS 2007: 2518-2521
24		S. Vijay, A. Prasad Vinod, Edmund Ming-Kit Lai: A Greedy Common Subexpression Elimination Algorithm for Implementing FIR Filters. ISCAS 2007: 3451-3454
23		Beilei Huang, Edmund Ming-Kit Lai, A. Prasad Vinod: Sampling at Minimum Sampling Rate for Signals in Shift Invariant Spaces. ISCAS 2007: 4004-4007
22		Himanshu Thapliyal, A. Prasad Vinod: Design of Reversible Sequential Elements With Feasibility of Transistor Implementation. ISCAS 2007: 625-628
	2006
21		Pramod Kumar Meher, A. Prasad Vinod, Jagdish Chandra Patra, M. N. S. Swamy: Reduced-Complexity Concurrent Systolic Implementation of the Discrete Sine Transform. APCCAS 2006: 1535-1538
20		A. Prasad Vinod, Chip-Hong Chang, Pramod Kumar Meher, Ankita Singla: Low Power FIR Filter Realization using Minimal Difference Coefficients: Part I - Complexity Analysis. APCCAS 2006: 1547-1550
19		A. Prasad Vinod, Chip-Hong Chang, Pramod Kumar Meher, Ankita Singla: Low Power FIR Filter Realization Using Minimal Difference Coefficients: Part II - Algorithm. APCCAS 2006: 1551-1554
18		Pramod Kumar Meher, Jagdish Chandra Patra, A. Prasad Vinod: A 2-D Systolic Array for High-Throughput Computation of 2-D Discrete Fourier Transform. APCCAS 2006: 1927-1930
17		Himanshu Thapliyal, A. Prasad Vinod: Transistor Realization of Reversible TSG Gate and Reversible Adder Architectures. APCCAS 2006: 418-421
16		Kavallur Gopi Smitha, H. A. H. Fahmy, A. Prasad Vinod: Redundant Adders Consume Less Energy. APCCAS 2006: 422-425
15		Jiajia Chen, Chip-Hong Chang, A. Prasad Vinod: Design of High-speed, Low-power FIR Filters with Fine-grained Cost Metrics. APCCAS 2006: 756-759
14		R. Mahesh, A. Prasad Vinod: A new common subexpression elimination algorithm for implementing low complexity FIR filters in software defined radio receivers. ISCAS 2006
13		A. Prasad Vinod, Ankita Singla, Chip-Hong Chang: Improved differential coefficients-based low power FIR filters. Part I. Fundamentals. ISCAS 2006
12		Chip-Hong Chang, Jiajia Chen, A. Prasad Vinod: Maximum likelihood disjunctive decomposition to reduced multirooted DAG for FIR filter design. ISCAS 2006
11		Himanshu Thapliyal, Hamid R. Arabnia, A. Prasad Vinod: Combined Integer and Floating Point Multiplication Architecture(CIFM) for FPGAs and Its Reversible Logic Implementation CoRR abs/cs/0610090: (2006)
10		A. Prasad Vinod, Edmund Ming-Kit Lai: Low power and high-speed implementation of fir filters for software defined radio receivers. IEEE Transactions on Wireless Communications 5(7): 1669-1675 (2006)
9		A. Prasad Vinod: Design and Experimental Evaluation of Improved Least Squares and Weighted Least Squares Quadrature Mirror Filters. IEICE Transactions 89-A(1): 310-315 (2006)
	2005
8		A. Prasad Vinod, Edmund Ming-Kit Lai: Design of low complexity high-speed pulse-shaping IIR filters for mobile communication receivers. ISCAS (1) 2005: 352-355
7		A. Prasad Vinod, Edmund Ming-Kit Lai: Comparison of the horizontal and the vertical common subexpression elimination methods for realizing digital filters. ISCAS (1) 2005: 496-499
6		A. Prasad Vinod, Edmund Ming-Kit Lai: Optimizing vertical common subexpression elimination using coefficient partitioning for designing low complexity software radio channelizers. ISCAS (6) 2005: 5429-5432
5		A. Prasad Vinod, Edmund Ming-Kit Lai: An efficient coefficient-partitioning algorithm for realizing low-complexity digital filters. IEEE Trans. on CAD of Integrated Circuits and Systems 24(12): 1936-1946 (2005)
4		A. Prasad Vinod, Edmund Ming-Kit Lai: On the implementation of efficient channel filters for wideband receivers by optimizing common subexpression elimination methods. IEEE Trans. on CAD of Integrated Circuits and Systems 24(2): 295-304 (2005)
	2004
3		A. Prasad Vinod, Edmund Ming-Kit Lai, A. Benjamin Premkumar, Chiew Tong Lau: Optimization method for designing filter bank channelizer of a software defined radio using vertical common subexpression elimination. ISCAS (4) 2004: 437-440
	2003
2		A. Prasad Vinod, A. Benjamin Premkumar, Edmund Ming-Kit Lai: An optimal entropy coding scheme for efficient implementation of pulse shaping FIR filters in digital receivers. ISCAS (4) 2003: 229-232
	2000
1		A. Prasad Vinod, A. Benjamin Premkumar: A Memoryless Reverse Converter for the 4-Moduli Superset {2n-1, 2n, 2n+1, 2n+1-1}. Journal of Circuits, Systems, and Computers 10(1-2): 85-100 (2000)

Coauthor Index

1	Hamid R. Arabnia	[11]
2	Chip-Hong Chang	[12] [13] [15] [19] [20]
3	Jiajia Chen	[12] [15]
4	H. A. H. Fahmy	[16]
5	Beilei Huang	[23]
6	Edmund Ming-Kit Lai	[2] [3] [4] [5] [6] [7] [8] [10] [23] [24] [29]
7	Chiew Tong Lau	[3]
8	R. Mahesh	[14] [25] [26] [29] [31]
9	Jimson Mathew	[29]
10	Pramod Kumar Meher	[18] [19] [20] [21]
11	Navin Michael	[32]
12	Jagdish Chandra Patra	[18] [21]
13	A. Benjamin Premkumar	[1] [2] [3]
14	Ankita Singla	[13] [19] [20]
15	Kavallur Gopi Smitha	[16] [27] [30] [33] [34]
16	M. N. S. Swamy	[21]
17	Himanshu Thapliyal	[11] [17] [22] [28]
18	S. Vijay	[24]

Colors in the list of coauthors