Daron Vroon

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2007
12EEPanagiotis Manolios, Sudarshan K. Srinivasan, Daron Vroon: BAT: The Bit-Level Analysis Tool. CAV 2007: 303-306
11EEPeter C. Dillinger, Panagiotis Manolios, Daron Vroon, J. Strother Moore: ACL2s: "The ACL2 Sedan". ICSE Companion 2007: 59-60
10EEPanagiotis Manolios, Daron Vroon, Gayatri Subramanian: Automating component-based system assembly. ISSTA 2007: 61-72
9EEPanagiotis Manolios, Daron Vroon: Efficient Circuit to CNF Conversion. SAT 2007: 4-9
8EEPeter C. Dillinger, Panagiotis Manolios, Daron Vroon, J. Strother Moore: ACL2s: "The ACL2 Sedan". Electr. Notes Theor. Comput. Sci. 174(2): 3-18 (2007)
2006
7EEPanagiotis Manolios, Daron Vroon: Termination Analysis with Calling Context Graphs. CAV 2006: 401-414
6EEPanagiotis Manolios, Sudarshan K. Srinivasan, Daron Vroon: Automatic memory reductions for RTL model verification. ICCAD 2006: 786-793
5EEPanagiotis Manolios, Daron Vroon: Integrating static analysis and general-purpose theorem proving for termination analysis. ICSE 2006: 873-876
4EEJohn Matthews, J. Strother Moore, Sandip Ray, Daron Vroon: Verification Condition Generation Via Theorem Proving. LPAR 2006: 362-376
2005
3EEPanagiotis Manolios, Daron Vroon: Ordinal Arithmetic: Algorithms and Mechanization. J. Autom. Reasoning 34(4): 387-423 (2005)
2004
2EEPanagiotis Manolios, Daron Vroon: Integrating Reasoning About Ordinal Arithmetic into ACL2. FMCAD 2004: 82-97
2003
1EEPanagiotis Manolios, Daron Vroon: Algorithms for Ordinal Arithmetic. CADE 2003: 243-257

Coauthor Index

1Peter C. Dillinger [8] [11]
2Panagiotis Manolios [1] [2] [3] [5] [6] [7] [8] [9] [10] [11] [12]
3John Matthews [4]
4J. Strother Moore [4] [8] [11]
5Sandip Ray [4]
6Sudarshan K. Srinivasan [6] [12]
7Gayatri Subramanian [10]

Copyright © Fri Aug 29 17:39:25 2008 by Michael Ley (ley@uni-trier.de)