Yasutaka Wada

	2008
5		Hiroaki Shikano, Masaki Ito, Kunio Uchiyama, Toshihiko Odaka, Akihiro Hayashi, Takeshi Masuura, Masayoshi Mase, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara: Software-cooperative power-efficient heterogeneous multi-core for media processing. ASP-DAC 2008: 736-741
4		Takamichi Miyamoto, Saori Asaka, Hiroki Mikami, Masayoshi Mase, Yasutaka Wada, Hirofumi Nakano, Keiji Kimura, Hironori Kasahara: Parallelization with Automatic Parallelizing Compiler Generating Consumer Electronics Multicore API. ISPA 2008: 600-607
3		Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara: Power-Aware Compiler Controllable Chip Multiprocessor. IEICE Transactions 91-C(4): 432-439 (2008)
	2007
2		Hiroaki Shikano, Jun Shirako, Yasutaka Wada, Keiji Kimura, Hironori Kasahara: Power-Aware Compiler Controllable Chip Multiprocessor. PACT 2007: 427
	2005
1		Jun Shirako, Naoto Oshiyama, Yasutaka Wada, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara: Compiler Control Power Saving Scheme for Multi Core Processors. LCPC 2005: 362-376

Coauthor Index

1	Saori Asaka	[4]
2	Akihiro Hayashi	[5]
3	Masaki Ito	[5]
4	Hironori Kasahara	[1] [2] [3] [4] [5]
5	Keiji Kimura	[1] [2] [3] [4] [5]
6	Masayoshi Mase	[4] [5]
7	Takeshi Masuura	[5]
8	Hiroki Mikami	[4]
9	Takamichi Miyamoto	[4]
10	Hirofumi Nakano	[4]
11	Toshihiko Odaka	[5]
12	Naoto Oshiyama	[1]
13	Hiroaki Shikano	[1] [2] [3] [5]
14	Jun Shirako	[1] [2] [3] [5]
15	Kunio Uchiyama	[5]