Jeffrey Walrath Coauthor index DBLP Vis pubzone.org

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DBLP keys1999
6no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLVinoo Srinivasan, Shankar Radhakrishnan, Ranga Vemuri, Jeffrey Walrath: Interconnect Synthesis for Reconfigurable Multi-FPGA Architectures. IPPS/SPDP Workshops 1999: 588-596
1998
5no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJeffrey Walrath, Ranga Vemuri: A Performance Modeling and Analysis Environment for Reconfigurable Computers. IPPS/SPDP Workshops 1998: 19-24
1997
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJeffrey Walrath, Ranga Vemuri: Symbolic Evaluation of Performance Models for Tradeoff Visualization. DAC 1997: 359-364
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJeffrey Walrath, Ranga Vemuri, W. Bradley: Performance verification using partial evaluation and interval analysis. ED&TC 1997: 622
1996
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLNaren Narasimhan, Vinoo Srinivasan, Madhavi Vootukuru, Jeffrey Walrath, Sriram Govindarajan, Ranga Vemuri: Rapid Prototyping of Reconfigurable Coprocessors. ASAP 1996: 303-312
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJeffrey Walrath: Performance Modeling and Tradeoff Analysis During Rapid Prototyping. ASAP 1996: 313-322

Coauthor Index

1W. Bradley [3]
2Sriram Govindarajan [2]
3Naren Narasimhan [2]
4Shankar Radhakrishnan [6]
5Vinoo Srinivasan [2] [6]
6Ranga Vemuri [2] [3] [4] [5] [6]
7Madhavi Vootukuru [2]

Copyright © Fri Dec 4 16:04:45 2009 by Michael Ley (ley@uni-trier.de)