 | 2009 |
| 14 |  | Qing Zhou,
Fang Yu,
Binqiang Wang:
An Algorithm Evaluating System Stability to Process.
ICA3PP 2009: 626-637 |
| 2008 |
| 13 |  | Na Wang,
Yingjian Zhi,
Binqiang Wang:
A New Path Verification Protocol for Securing BGP.
HPCC 2008: 425-431 |
| 12 |  | Yingjian Zhi,
Na Wang,
Binqiang Wang,
Lei He:
Urgency-Based Batching Policy for Streaming Media.
HPCC 2008: 580-585 |
| 11 |  | Na Wang,
Yingjian Zhi,
Binqiang Wang:
AT: An Origin Verification Mechanism Based on Assignment Track for Securing BGP.
ICC 2008: 5739-5745 |
| 10 |  | Yufeng Li,
Han Qiu,
Julong Lan,
Binqiang Wang:
A Forwarding Approach for Routers Supporting PIM-SM in the IPv6 Networks.
ICC 2008: 5909-5913 |
| 9 |  | Wei He,
Hui Li,
Bing-rui Wang,
Qin-shu Chen,
Peng Yi,
Binqiang Wang:
Load-Balanced Multipath Self-Routing Switching Structure by Concentrators.
ICC 2008: 5935-5939 |
| 2006 |
| 8 |  | Peng Yi,
Han Qiu,
Binqiang Wang:
Implementing Priority Scheduling in a Combined Input-Crosspoint-Output Queued Switch.
AINA (2) 2006: 768-774 |
| 7 |  | Peng Yi,
Binqiang Wang,
Yunfei Guo:
Providing QoS Guarantees in Buffered Crossbars with Space-Division Multiplexing Expansion.
GLOBECOM 2006 |
| 6 |  | Qiang Liu,
Shaomei Li,
Hongyong He,
Binqiang Wang:
A Multi-binding Solution for Simultaneous Mobility of MIPv6.
SOSE 2006: 143-146 |
| 2005 |
| 5 |  | Yusong Lin,
Binqiang Wang,
Zongmin Wang:
MixCast: A New Group Communication Model in Large-Scale Network.
AINA 2005: 307-310 |
| 4 |  | Ximing Hu,
Xingming Zhang,
Binqiang Wang,
Zhengrong Zhao:
Scheduling Multicast Traffic in a Combined Input Separate Output Queued Switch.
NPC 2005: 441-448 |
| 3 |  | Ximing Hu,
Jing Qu,
Binqiang Wang,
Xiaobei Li:
CISOQ: A Practical High-Performance Packet Switch Architecture for the Support of Multicast Traffic.
PDCAT 2005: 139-143 |
| 2 |  | Jing Qu,
Ximing Hu,
Peng Yi,
Xingming Zhang,
Binqiang Wang:
A High-Performance Scheduling Algorithm Based on Packet Sto.
SKG 2005: 44 |
| 2003 |
| 1 |  | Yuguo Dong,
Binqiang Wang,
Yunfei Guo,
Jiangxing Wu:
Maintaining Packet Order for the Parallel Switch.
GCC (1) 2003: 176-179 |