 | 2008 |
|---|
| 4 |       | Zvika Guz,
Idit Keidar,
Avinoam Kolodny,
Uri C. Weiser:
Utilizing shared data in chip multiprocessors with the nahalal architecture.
SPAA 2008: 1-10 |
| 2007 |
|---|
| 3 | | Zvika Guz,
Idit Keidar,
Avinoam Kolodny,
Uri C. Weiser:
Nahalal: Cache Organization for Chip Multiprocessors.
Computer Architecture Letters 6(1): 21-24 (2007) |
| 2006 |
|---|
| 2 | | T. Y. Morad,
Uri C. Weiser,
A. Kolodnyt,
Mateo Valero,
Eduard Ayguadé:
Performance, power efficiency and scalability of asymmetric cluster chip multiprocessors.
Computer Architecture Letters 5(1): 14-17 (2006) |
| 2004 |
|---|
| 1 | | Nir Magen,
Avinoam Kolodny,
Uri C. Weiser,
Nachum Shamir:
Interconnect-power dissipation in a microprocessor.
SLIP 2004: 7-13 |
