Shlomo Weiss

	2009
33		Amit Golander, Shlomo Weiss: Reexecution and Selective Reuse in Checkpoint Processors. T. HiPEAC 2: 242-268 (2009)
32		Ron Gabor, Avi Mendelson, Shlomo Weiss: Service level agreement for multithreaded processors. TACO 6(2): (2009)
31		Amit Golander, Shlomo Weiss: Checkpoint allocation and release. TACO 6(3): (2009)
	2008
30		Roger Kahn, Shlomo Weiss: Thrifty BTB: A comprehensive solution for dynamic power reduction in branch target buffers. Microprocessors and Microsystems - Embedded Hardware Design 32(8): 425-436 (2008)
29		Amit Golander, Shlomo Weiss: Hiding the misprediction penalty of a resource-efficient high-performance processor. TACO 4(4): (2008)
	2007
28		Ron Gabor, Shlomo Weiss, Avi Mendelson: Fairness enforcement in switch on event multithreading. TACO 4(3): (2007)
	2006
27		Ron Gabor, Shlomo Weiss, Avi Mendelson: Fairness and Throughput in Switch on Event Multithreading. MICRO 2006: 149-160
26		Yehuda Sadeh Weinraub, Shlomo Weiss: Power-aware out-of-order issue logic in high-performance microprocessors. Microprocessors and Microsystems 30(7): 457-467 (2006)
	2004
25		Doron Nakar, Shlomo Weiss: Selective main memory compression by identifying program phase changes. WMPI 2004: 96-101
24		Tomer Karin, Shlomo Weiss: Programming Windows NT device drivers to operate non-interrupting embedded devices. Microprocessors and Microsystems 28(1): 27-35 (2004)
	2003
23		Avishay Orpaz, Shlomo Weiss: Pattern Matching by means of Multi-Resolution Compression. DCC 2003: 441
22		Shlomo Weiss, Shay Beren: Class-Based Decompressor Design for Compressed Instruction Memory in Embedded Processors. IEEE Trans. Computers 52(11): 1495-1500 (2003)
21		Shlomo Weiss, Roman Tsikel: Approximate prefix coding for system-on-a-chip programs. Journal of Systems Architecture 48(13-15): 367-375 (2003)
	2002
20		Avishay Orpaz, Shlomo Weiss: A study of CodePack: optimizing embedded code space. CODES 2002: 103-108
19		Ehud Finkelstein, Shlomo Weiss: A PCI bus simulation framework and some simulation results on PCI standard 2.1 latency limitations. Journal of Systems Architecture 47(9): 807-819 (2002)
	2001
18		Shlomo Weiss, Shay Beren: HW/SW partitioning of an embedded instruction memory decompressor. CODES 2001: 36-41
	1999
17		Shlomo Weiss, Ehud Finkelstein: Extending PCI Performance Beyond the Desktop. IEEE Computer 32(6): 80-87 (1999)
16		Ehud Finkelstein, Shlomo Weiss: Microprocessor system buses: A case study. Journal of Systems Architecture 45(12-13): 1151-1168 (1999)
	1998
15		Eitan Federovsky, Meir Feder, Shlomo Weiss: Branch Prediction Based on Universal Data Compression Algorithms. ISCA 1998: 62-72
14		Shlomo Reches, Shlomo Weiss: Implementation and Analysis of Path History in Dynamic Branch Prediction Schemes. IEEE Trans. Computers 47(8): 907-912 (1998)
	1997
13		Shlomo Reches, Shlomo Weiss: Implementation and Analysis of Path History in Dynamic Branch Prediction Schemes. International Conference on Supercomputing 1997: 285-292
	1995
12		Shlomo Weiss: Implementing Register Interlocks in Parallel-Pipeline Multiple Instruction Queue, Superscalar Processors. HPCA 1995: 14-21
	1994
11		James E. Smith, Shlomo Weiss: PowerPC 601 and Alpha 21064: A Tale of Two RISCs. IEEE Computer 27(6): 46-58 (1994)
	1992
10		Ravi Ganesan, Shlomo Weiss: Scalar Memory References in Pipelined Multiprocessors: A Performance Study. IEEE Trans. Software Eng. 18(1): 78-86 (1992)
	1991
9		Shlomo Weiss: Multiple-Port Memory Access in Decoupled Architecture Processors. ICPP (1) 1991: 373-376
	1990
8		Shlomo Weiss, James E. Smith: A study of scalar compilation techniques for pipelined supercomputers. ACM Trans. Math. Softw. 16(3): 223-245 (1990)
	1989
7		Shlomo Weiss: An Aperiodic Storage Scheme to Reduce Memory Conflicts in Vector Processors. ISCA 1989: 380-386
	1987
6		Shlomo Weiss, James E. Smith: A Study of Scalar Compilation Techniques for Pipelined Supercomputers. ASPLOS 1987: 105-109
	1986
5		Shlomo Weiss, Katie Rotzell, Tom Rhyne, Arny Goldfein: DOSS: a storage system for design data. DAC 1986: 41-47
4		James E. Smith, Shlomo Weiss, Nicholas Y. Pang: A Simulation Study of Decoupled Architecture Computers. IEEE Trans. Computers 35(8): 692-702 (1986)
	1984
3		Shlomo Weiss: Recovery of In-Memory Data Structures for Interactive Update Applications. COMPCON 1984: 335-338
2		Shlomo Weiss, James E. Smith: Instruction Issue Logic for Pipelined Supercomputers. ISCA 1984: 110-118
1		Shlomo Weiss, James E. Smith: Instruction Issue Logic in Pipelined Supercomputers. IEEE Trans. Computers 33(11): 1013-1022 (1984)

Coauthor Index

1	Shay Beren	[18] [22]
2	Meir Feder	[15]
3	Eitan Federovsky	[15]
4	Ehud Finkelstein	[16] [17] [19]
5	Ron Gabor	[27] [28] [32]
6	Ravi Ganesan	[10]
7	Amit Golander	[29] [31] [33]
8	Arny Goldfein	[5]
9	Roger Kahn	[30]
10	Tomer Karin	[24]
11	Avi Mendelson	[27] [28] [32]
12	Doron Nakar	[25]
13	Avishay Orpaz	[20] [23]
14	Nicholas Y. Pang	[4]
15	Shlomo Reches	[13] [14]
16	Tom Rhyne	[5]
17	Katie Rotzell	[5]
18	James E. Smith	[1] [2] [4] [6] [8] [11]
19	Roman Tsikel	[21]
20	Yehuda Sadeh Weinraub	[26]

Colors in the list of coauthors