 | 2008 |
| 30 |  | Zexin Pan,
B. Earl Wells:
Hardware Supported Task Scheduling on Dynamically Reconfigurable SoC Architectures.
IEEE Trans. VLSI Syst. 16(11): 1465-1474 (2008) |
| 2007 |
| 29 |  | Swathi Tanjore Gurumani,
B. Earl Wells:
Energy-Efficient Dynamic Task Scheduling Algorithm for Reconfigurable System-on-Chip Architectures.
ERSA 2007: 37-43 |
| 28 |  | Swathi Tanjore Gurumani,
B. Earl Wells:
Dynamic Power Management in Power-Aware Reconfigurable System-on-Chip Architectures.
ESA 2007: 177-183 |
| 2006 |
| 27 |  | A. H. Abou-Ali,
S. M. Abd-El-Moetty,
B. Earl Wells:
Re-Configurable Hardware Based Fractal Neural Processor.
ISCA PDCS 2006: 187-192 |
| 26 |  | Swathi Tanjore Gurumani,
Mathew M. Noel,
B. Earl Wells,
Thomas C. Jannett:
Performance Analysis of Coarse-Grained Parallel Particle Swarm Optimization.
ISCA PDCS 2006: 197-202 |
| 25 |  | Kenneth G. Ricks,
David Jeff Jackson,
B. Earl Wells:
Guidelines for Unified System Specification for Co-Design of Embedded Systems.
I. J. Comput. Appl. 13(3): 128-141 (2006) |
| 24 |  | Sin Ming Loo,
B. Earl Wells:
Task Scheduling in a Finite-Resource, Reconfigurable Hardware/Software Codesign Environment.
INFORMS Journal on Computing 18(2): 151-172 (2006) |
| 2005 |
| 23 |  | Zexin Pan,
Juanjo Noguera,
B. Earl Wells:
Improved Microarchitecture Support for Dynamic Task Scheduling on Reconfigurable Architectures.
ERSA 2005: 182-188 |
| 22 |  | Yahya M. Tashtoush,
B. Earl Wells,
Thomas C. Jannett:
Applying Fuzzy-Reinforcement Learning to Track a Mobile Target Using a Wireless Sensor Network.
ICWN 2005: 427-433 |
| 21 |  | Sin Ming Loo,
B. Earl Wells:
Applying Stochastic Static Task Scheduling to a Reconfigurable Hardware Environment.
I. J. Comput. Appl. 12(2): 57-75 (2005) |
| 2004 |
| 20 |  | Rami A. AL-Na'mneh,
W. David Pan,
B. Earl Wells:
Two parallel implementations for one dimension FFT on symmetric multiprocessors.
ACM Southeast Regional Conference 2004: 273-278 |
| 19 |  | Hamid Reza Naji,
B. Earl Wells,
Letha H. Etzkorn:
Creating an adaptive embedded system by applying multi-agent techniques to reconfigurable hardware.
Future Generation Comp. Syst. 20(6): 1055-1081 (2004) |
| 2003 |
| 18 |  | Kenneth G. Ricks,
David Jeff Jackson,
B. Earl Wells:
A Survey and Analysis of Existing Constraint Combination Formalisms and Their Applications to Software Systems Having Client-Server Relationships.
Computers and Their Applications 2003: 248-253 |
| 17 |  | Kenneth G. Ricks,
David Jeff Jackson,
B. Earl Wells:
More Accurate Semantics Defining Constraint Combination for Software Systems Having Client-Server Relationships.
Computers and Their Applications 2003: 269-274 |
| 16 |  | Sin Ming Loo,
B. Earl Wells,
J. D. Winningham:
A Genetic Algorithm Approach to Static Task Scheduling in a Reconfigurable Hardware Environment.
Computers and Their Applications 2003: 36-39 |
| 15 |  | Saleh H. Al-Sharaeh,
B. Earl Wells:
A Scalable Three-Dimensional Domain Decomposition Mapping Technique Using MPI.
Computers and Their Applications 2003: 369-372 |
| 14 |  | Zexin Pan,
Srikanth Venkateswaran,
Swathi Tanjore Gurumani,
B. Earl Wells:
Exploiting Fine-Grain Parallelism of IDEA Using Xilinx FPGA.
ISCA PDCS 2003: 377-382 |
| 13 |  | Kenneth G. Ricks,
David Jeff Jackson,
B. Earl Wells:
The Application of Software Process Precedence Relationship Formalisms to Concurrent Hardware Systems.
PDPTA 2003: 1532-1538 |
| 12 |  | John M. Weir,
B. Earl Wells:
An Agent Inspired Reconfigurable Computing Implementation of a Genetic Algorithm.
PDPTA 2003: 410-416 |
| 2002 |
| 11 |  | Hamid Reza Naji,
B. Earl Wells,
Mohamed Aborizka:
Hardware Agents.
ISCA Conference on Intelligent Systems 2002: 77-82 |
| 10 |  | Kenneth G. Ricks,
John M. Weirs,
B. Earl Wells:
SADL: Simulation Architecture Description Language.
I. J. Comput. Appl. 9(3): 126-138 (2002) |
| 2001 |
| 9 |  | Kenneth G. Ricks,
John M. Weirs,
B. Earl Wells:
SADL: Simulation Architecture Description Language Kenneth.
ISCA PDCS 2001: 219-224 |
| 8 |  | Sin Ming Loo,
B. Earl Wells,
R. K. Gaede:
Exploring the Hardware/Software Continuum in a Computer Engineering Capstone Design Class Using FPGA-based Programmable Logic.
MSE 2001: 36-37 |
| 1999 |
| 7 |  | Sin Ming Loo,
B. Earl Wells,
Nagendra Singh,
Edith P. Huang:
Case Study: A Portable Parallel Particle-In-Cell Code Simulation.
PDPTA 1999: 1488-1494 |
| 1997 |
| 6 |  | B. Earl Wells,
John Glaese:
Applying Parallel and Distributed Processing Techniques to a Tether Dynamics Simulation.
PDPTA 1997: 667-673 |
| 5 |  | A. Abdelmageed Elsadek,
Salleh Alsharaeh,
B. Earl Wells,
Nagendra Singh:
Parallel Three-Dimensional Particle-In-Cell Code Simulation on a Cluster of Heterogeneous Workstation.
PDPTA 1997: 701-707 |
| 4 |  | B. Earl Wells,
Kenneth G. Ricks:
Applying.Parallel Block Predictor-Corrector Methods to Transputer Type Configurations.
PDPTA 1997: 937-946 |
| 3 |  | B. Earl Wells,
Christian Tournes,
Lee Young:
A Case Study: In Support of Employing a Transputer-Style Architecture for Avionics Mission and Information Processing.
PDPTA 1997: 957-966 |
| 1996 |
| 2 |  | A. Abdelmageed Elsadek,
B. Earl Wells:
Heuristic Model for Task Allocation in a Heterogeneous Distributed Computing System.
PDPTA 1996: 659-674 |
| 1995 |
| 1 |  | A. Abdelmageed Elsadek,
B. Earl Wells:
An Improved Heuristic Model for Task Allocation in Distributed Computer Systems .
PDPTA 1995: 187-196 |