Kazimierz Wiatr

	2009
18		Maciej Wielgosz, Ernest Jamro, Kazimierz Wiatr: Accelerating Calculations on the RASC Platform: A Case Study of the Exponential Function. ARC 2009: 306-311
	2008
17		Maciej Wielgosz, Ernest Jamro, Kazimierz Wiatr: Highly efficient structure of 64-bit exponential function implemented in FPGAs. ARC 2008: 272-277
	2007
16		Pawel Russek, Kazimierz Wiatr: Dedicated Architecture for Double Precision Matrix Multiplication in Supercomputing Environment. DDECS 2007: 321-324
15		Ernest Jamro, Maciej Wielgosz, Kazimierz Wiatr: FPGA Implementation of Strongly Parallel Histogram Equalization. DDECS 2007: 93-98
14		Ernest Jamro, Kazimierz Wiatr, Maciej Wielgosz: FPGA Implementation of 64-bit Exponential Function for HPC. FPL 2007: 718-721
	2002
13		Ernest Jamro, Kazimierz Wiatr: Constant Coefficient Convolution Implemented in FPGAs. DSD 2002: 291-298
12		Ernest Jamro, Kazimierz Wiatr: Dynamic Constant Coefficient Convolvers Implemented in FPGAs. FPL 2002: 1110-1113
	2001
11		Andrzej Ryszko, Kazimierz Wiatr: An Assesment of FPGA Suitability for Implementation of Real-Time Motion Estimation. DSD 2001: 364-367
10		Ernest Jamro, Kazimierz Wiatr: FPGA Implementation of Addition as a Part of the Convolution. DSD 2001: 458-465
9		Ernest Jamro, Kazimierz Wiatr: Genetic Programming in FPGA Implementation of Addition as a Part of the Convolution. DSD 2001: 466-474
8		Ernest Jamro, Kazimierz Wiatr: Implementation of Convolution Operation on General Purpose Processors. EUROMICRO 2001: 410-
7		Kazimierz Wiatr, Ernest Jamro: Implementation of Multipliers in FPGA Structures. ISQED 2001: 415-
	2000
6		Kazimierz Wiatr, Ernest Jamro: Constant Coefficient Multiplication in FPGA Structures. EUROMICRO 2000: 1252-1259
5		Kazimierz Wiatr, Pawel Russek: Embedded Zero Wavelet Coefficient Coding Method for FPGA Implementation of Video Codec in Real-Time Systems. ITCC 2000: 146-151
4		Kazimierz Wiatr, Ernest Jamro: Implementation Image Data Convolutions Operations in FPGA Reconfigurable Structures for Real-Time Vision Systems. ITCC 2000: 152-157
	1999
3		Kazimierz Wiatr: MISD Architecture of Specialized Processors in FPGA Structures for a Real-Time Video Data Pre-Processing. PDPTA 1999: 1196-1202
	1998
2		Kazimierz Wiatr: Pipeline Architecture of Specialized Reconfigurable Processors in FPGA Structures for Real-Time Image Pre-Processing. EUROMICRO 1998: 10131-10138
	1997
1		Kazimierz Wiatr: Dedicated Hardware Processors for a Real-Time Image Data Pre-processing Implemented in FPGA Structure. ICIAP (2) 1997: 69-76

Coauthor Index

1	Ernest Jamro	[4] [6] [7] [8] [9] [10] [12] [13] [14] [15] [17] [18]
2	Pawel Russek	[5] [16]
3	Andrzej Ryszko	[11]
4	Maciej Wielgosz	[14] [15] [17] [18]

Colors in the list of coauthors