Gustavo Wilke Coauthor index DBLP Vis pubzone.org

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DBLP keys2008
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGustavo Wilke, Ricardo Reis: A New Clock Mesh Buffer Sizing Methodology for Skew and Power Reduction. ISVLSI 2008: 227-232
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLGustavo Wilke, Renan Fonseca, Cecilia Mezzomo, Ricardo Reis: A novel scheme to reduce short-circuit power in mesh-based clock architectures. SBCCI 2008: 117-122
2003
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDavid Guerrero, Gustavo Wilke, José Luís Almada Güntzel, Manuel J. Bellido, Jorge Juan-Chico, Paulino Ruiz-de-Clavijo, Alejandro Millán: Computational Delay Models to Estimate the Delay of Floating Cubes in CMOS Circuits. PATMOS 2003: 501-510
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLDaniel Lima Ferrão, Gustavo Wilke, Ricardo Augusto da Luz Reis, José Luís Almada Güntzel: Improving Critical Path Identification in Functional Timing Analysis. SBCCI 2003: 297-302
1Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLCristiano Santos, Gustavo Wilke, Cristiano Lazzari, Ricardo Reis, José Luís Almada Güntzel: A Transistor Sizing Method Applied to an Automatic Layout Generation Tool. SBCCI 2003: 303-

Coauthor Index

1Manuel Jesús Bellido Díaz (Manuel J. Bellido) [3]
2Daniel Lima Ferrão [2]
3Renan Fonseca [4]
4David Guerrero [3]
5José Luís Almada Güntzel [1] [2] [3]
6Jorge Juan-Chico [3]
7Cristiano Lazzari [1]
8Cecilia Mezzomo [4]
9Alejandro Millán (Alejandro Millán Calderón) [3]
10Ricardo Augusto da Luz Reis (Ricardo A. L. Reis, Ricardo Reis) [1] [2] [4] [5]
11Paulino Ruiz-de-Clavijo [3]
12Cristiano Santos [1]

Copyright © Wed Dec 23 18:45:02 2009 by Michael Ley (ley@uni-trier.de)