Mateusz Wrzesinski

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2006

1 Marek Gorgon, Mateusz Wrzesinski: Neural Network Implementation in Reprogrammable FPGA Devices - An Example for MLP. ICAISC 2006: 19-28

	2006
1		Marek Gorgon, Mateusz Wrzesinski: Neural Network Implementation in Reprogrammable FPGA Devices - An Example for MLP. ICAISC 2006: 19-28

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