Xingjun Wu

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2003

1 Xingjun Wu, Hongyi Chen, Yihe Sun, Weixin Gai: A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems. VLSI Signal Processing 33(1-2): 191-197 (2003)

	2003
1		Xingjun Wu, Hongyi Chen, Yihe Sun, Weixin Gai: A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems. VLSI Signal Processing 33(1-2): 191-197 (2003)

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