Jingyu Xu

	2007
14		Jingyu Xu, Subarna Sinha, Charles Chiang: Accurate detection for process-hotspots with vias and incomplete specification. ICCAD 2007: 839-846
	2006
13		Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu: A coupling and crosstalk-considered timing-driven global routing algorithm for high-performance circuit design. Integration 39(4): 457-473 (2006)
	2005
12		Tong Jing, Ling Zhang, Jinghong Liang, Jingyu Xu, Xianlong Hong, Jinjun Xiong, Lei He: A Min-area Solution to Performance and RLC Crosstalk Driven Global Routing Problem. ASP-DAC 2005: 115-120
11		Jingyu Xu, Xianlong Hong, Tong Jing: Timing-driven global routing with efficient buffer insertion. ISCAS (3) 2005: 2449-2452
10		Jingyu Xu, Xianlong Hong, Tong Jing, Yang Yang: Obstacle-Avoiding Rectilinear Minimum-Delay Steiner Tree Construction towards IP-Block-Based SOC Design. ISQED 2005: 616-621
9		Jingyu Xu, Xianlong Hong, Tong Jing: Timing-Driven Global Routing with Efficient Buffer Insertion. IEICE Transactions 88-A(11): 3188-3195 (2005)
	2004
8		Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu: A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design. ASP-DAC 2004: 677-682
7		Ling Zhang, Tong Jing, Xianlong Hong, Jingyu Xu, Jinjun Xiong, Lei He: Performance and RLC crosstalk driven global routing. ISCAS (5) 2004: 65-68
6		Tong Jing, Xianlong Hong, Jingyu Xu, Haiyun Bao, Chung-Kuan Cheng, Jun Gu: UTACO: a unified timing and congestion optimization algorithm for standard cell global routing. IEEE Trans. on CAD of Integrated Circuits and Systems 23(3): 358-365 (2004)
	2003
5		Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu: An efficient hierarchical timing-driven Steiner tree algorithm for global routing. Integration 35(2): 69-84 (2003)
4		Tong Jing, Xianlong Hong, Haiyun Bao, Jingyu Xu, Gu Jun: SSTT: Efficient Local Search for GSI Global Routing. J. Comput. Sci. Technol. 18(5): 632-640 (2003)
3		Xianlong Hong, Tong Jing, Jingyu Xu, Haiyun Bao, Gu Jun: CNB: A Critical-Network-Based Timing Optimization Method for Standard Cell Global Routing. J. Comput. Sci. Technol. 18(6): 732-738 (2003)
	2002
2		Tong Jing, Xianlong Hong, Haiyun Bao, Yici Cai, Jingyu Xu, Jun Gu: A novel and efficient timing-driven global router for standard cell layout design based on critical network concept. ISCAS (1) 2002: 165-168
1		Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu: An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing. VLSI Design 2002: 473-478

Coauthor Index

1	Haiyun Bao	[2] [3] [4] [6]
2	Yici Cai	[1] [2] [5]
3	Chung-Kuan Cheng	[6]
4	Charles Chiang	[14]
5	Jun Gu	[1] [2] [5] [6] [8] [13]
6	Lei He	[7] [12]
7	Xianlong Hong	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
8	Tong Jing	[1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
9	Gu Jun	[3] [4]
10	Jinghong Liang	[12]
11	Subarna Sinha	[14]
12	Jinjun Xiong	[7] [12]
13	Yang Yang	[10]
14	Ling Zhang	[7] [8] [12] [13]