| 2007 | ||
|---|---|---|
| 3 | Mototsugu Hamada, Takeshi Kitahara, Naoyuki Kawabe, Hironori Sato, Tsuyoshi Nishikawa, Takayoshi Shimazawa, Takahiro Yamashita, Hiroyuki Hara, Yukihito Oowaki: An automated runtime power-gating scheme. ICCD 2007: 382-387 | |
| 2006 | ||
| 2 | Koichiro Ishibashi, Tetsuya Fujimoto, Takahiro Yamashita, Hiroyuki Okada, Yukio Arima, Yasuyuki Hashimoto, Kohji Sakata, Isao Minematsu, Yasuo Itoh, Haruki Toda, Motoi Ichihashi, Yoshihide Komatsu, Masato Hagiwara, Toshiro Tsukada: Low-Voltage and Low-Power Logic, Memory, and Analog Circuit Techniques for SoCs Using 90 nm Technology and Beyond. IEICE Transactions 89-C(3): 250-262 (2006) | |
| 2005 | ||
| 1 | Takahiro Yamashita, Tetsuya Fujimoto, Koichiro Ishibashi: Power Valve: for low power operation and low stand-by power. IEICE Electronic Express 2(3): 64-69 (2005) | |