 | 2009 |
|---|
| 12 |       | Hui Kong,
Tan Yan,
Martin D. F. Wong:
Automatic bus planner for dense PCBs.
DAC 2009: 326-331 |
| 11 | | Tan Yan,
Martin D. F. Wong:
A correct network flow model for escape routing.
DAC 2009: 332-335 |
| 10 | | Tan Yan,
Martin D. F. Wong:
Theories and algorithms on single-detour routing for untangling twisted bus.
ACM Trans. Design Autom. Electr. Syst. 14(3): (2009) |
| 2008 |
|---|
| 9 | | Tan Yan,
Martin D. F. Wong:
BSG-Route: a length-matching router for general topology.
ICCAD 2008: 499-505 |
| 2007 |
|---|
| 8 | | Tan Yan,
Shuting Li,
Yasuhiro Takashima,
H. Murata:
A Theoretical Study on Wire Length Estimation Algorithms for Placement with Opaque Blocks.
ASP-DAC 2007: 268-273 |
| 7 | | Hui Kong,
Tan Yan,
Martin D. F. Wong,
Muhammet Mustafa Ozdal:
Optimal bus sequencing for escape routing in dense PCBs.
ICCAD 2007: 390-395 |
| 6 | | Tan Yan,
Martin D. F. Wong:
Untangling twisted nets for bus routing.
ICCAD 2007: 396-400 |
| 2006 |
|---|
| 5 | | Tan Yan,
Qing Dong,
Yasuhiro Takashima,
Yoji Kajitani:
How does partitioning matter for 3D floorplanning?
ACM Great Lakes Symposium on VLSI 2006: 73-78 |
| 4 | | Tan Yan,
Hiroshi Murata:
Fast wire length estimation by net bundling for block placement.
ICCAD 2006: 172-178 |
| 3 | | Tan Yan,
Shigetoshi Nakatake,
Takashi Nojima:
Formulating the Empirical Strategies in Module Generation of Analog MOS Layout.
ISVLSI 2006: 44-49 |
| 2005 |
|---|
| 2 | | Tan Yan,
Haruna Murata:
A robust and correct computation for the curvilinear routing problem.
ISCAS (6) 2005: 5678-5681 |
| 2004 |
|---|
| 1 | | Jing Li,
Tan Yan,
Bo Yang,
Juebang Yu,
Chunhui Li:
A packing algorithm for non-manhattan hexagon/triangle placement design by using an adaptive o-tree representation.
DAC 2004: 646-651 |
