| 2009 | ||
|---|---|---|
| 48 | Jue Wang, Beihua Ying, Yongpan Liu, Huazhong Yang, Hui Wang: Energy efficient architecture of sensor network node based on compression accelerator. ACM Great Lakes Symposium on VLSI 2009: 117-120 | |
| 47 | Yu Wang, Jiang Xu, Shengxi Huang, Weichen Liu, Huazhong Yang: A case study of on-chip sensor network in multiprocessor system-on-chip. CASES 2009: 241-250 | |
| 46 | Hengyu Long, Yongpan Liu, Xiaoguang Fan, Robert P. Dick, Huazhong Yang: Energy-efficient spatially-adaptive clustering and routing in wireless sensor networks. DATE 2009: 1267-1272 | |
| 45 | Yu Wang, Xiaoming Chen, Wenping Wang, Yu Cao, Yuan Xie, Huazhong Yang: Gate replacement techniques for simultaneous leakage and aging optimization. DATE 2009: 328-333 | |
| 44 | Xiaoming Chen, Yu Wang, Yu Cao, Yuchun Ma, Huazhong Yang: Variation-aware supply voltage assignment for minimizing circuit degradation and leakage. ISLPED 2009: 39-44 | |
| 43 | Yu Wang, Xiaoming Chen, Wenping Wang, Varsha Balakrishnan, Yu Cao, Yuan Xie, Huazhong Yang: On the efficacy of input Vector Control to mitigate NBTI effects and leakage power. ISQED 2009: 19-26 | |
| 42 | Fei Wei, Huazhong Yang: From devil to angel, transmission lines boost parallel computing of linear resistor networks CoRR abs/0910.0663: (2009) | |
| 41 | Bingbing Xia, Fei Qiao, Huazhong Yang, Hui Wang: A Fault-tolerant Structure for Reliable Multi-core Systems Based on Hardware-Software Co-design CoRR abs/0910.3736: (2009) | |
| 40 | Hong Luo, Yu Wang, Rong Luo, Huazhong Yang, Yuan Xie: Temperature-Aware NBTI Modeling Techniques in Digital Circuits. IEICE Transactions 92-C(6): 875-886 (2009) | |
| 2008 | ||
| 39 | Saihua Lin, Yu Wang, Rong Luo, Huazhong Yang: A capacitive boosted buffer technique for high-speed process-variation-tolerant interconnect in UDVS application. ASP-DAC 2008: 304-309 | |
| 38 | Qian Ding, Yu Wang, Hui Wang, Rong Luo, Huazhong Yang: Output Remapping Technique for Soft-Error Rate Reduction in Critical Paths. ISQED 2008: 74-77 | |
| 37 | Fei Wei, Huazhong Yang: Directed transmission method, a fully asynchronous approach to solve sparse linear systems in parallel. SPAA 2008: 365 | |
| 36 | Yang Li, Shuzheng Xu, Huazhong Yang: Design of Signal Constellations in the Presence of Phase Noise. VTC Fall 2008: 1-5 | |
| 35 | Fei Wei, Huazhong Yang: Virtual Transmission Method, A New Distributed Algorithm to Solve Sparse Linear Systems CoRR abs/0807.1949: (2008) | |
| 34 | Fei Wei, Huazhong Yang: Directed Transmission Method, A Fully Asynchronous Approach to Solve Sparse Linear Systems in Parallel CoRR abs/0810.3783: (2008) | |
| 33 | Saihua Lin, Huazhong Yang, Rong Luo: A New Family of Sequential Elements With Built-in Soft Error Tolerance for Dual-VDD Systems. IEEE Trans. VLSI Syst. 16(10): 1372-1384 (2008) | |
| 32 | Yu Wang, Ku He, Rong Luo, Hui Wang, Huazhong Yang: Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits. IEEE Trans. VLSI Syst. 16(9): 1101-1113 (2008) | |
| 31 | Fei Qiao, Huazhong Yang, Gang Huang, Hui Wang: Implementation of low-swing differential interface circuits for high-speed on-chip asynchronous interconnection. Science in China Series F: Information Sciences 51(7): 975-984 (2008) | |
| 2007 | ||
| 30 | Yongpan Liu, Robert P. Dick, Li Shang, Huazhong Yang: Accurate temperature-dependent integrated circuit leakage power estimation is easy. DATE 2007: 1526-1531 | |
| 29 | Yu Wang, Hong Luo, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: Temperature-aware NBTI modeling and the impact of input vector control on performance degradation. DATE 2007: 546-551 | |
| 28 | Saihua Lin, Huazhong Yang, Rong Luo: A Novel Low Power Interface Circuit Design Technique for Multiple Voltage Islands Scheme. ISCAS 2007: 1401-1404 | |
| 27 | Shaohua Wang, Jinguo Quan, Rong Luo, Hao Cheng, Huazhong Yang: A Noise Reduced Digitally Controlled Oscillator Using Complementary Varactor Pairs. ISCAS 2007: 937-940 | |
| 26 | Shuzheng Xu, Pengjun Wang, Feng Zhang, Huazhong Yang: DRM - the Digital Radio on the Way. ISCC 2007: 151-154 | |
| 25 | Hong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: Modeling of PMOS NBTI Effect Considering Temperature Variation. ISQED 2007: 139-144 | |
| 24 | Yongpan Liu, Huazhong Yang, Robert P. Dick, Hui Wang, Li Shang: Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems. ISQED 2007: 204-209 | |
| 23 | Saihua Lin, Huazhong Yang, Rong Luo: High Speed Soft-Error-Tolerant Latch and Flip-Flop Design for Multiple VDD Circuit. ISVLSI 2007: 273-278 | |
| 22 | Hong Luo, Yu Wang, Ku He, Rong Luo, Huazhong Yang, Yuan Xie: A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect. PATMOS 2007: 160-170 | |
| 21 | Saihua Lin, Huazhong Yang, Rong Luo: A Novel gamma d/n, RLCG Transmission Line Model Considering Complex RC(L) Loads. IEEE Trans. on CAD of Integrated Circuits and Systems 26(5): 970-977 (2007) | |
| 20 | Fei Qiao, Huazhong Yang, Dingli Wei, Hui Wang: Modified Conditional-Precharge Sense-amplifier-Based Flip-Flop with Improved Speed. Journal of Circuits, Systems, and Computers 16(2): 199-210 (2007) | |
| 19 | JianXing Fan, Huazhong Yang, Hui Wang, Xiaolang Yan, Chaohuan Hou: Phase noise analysis of oscillators with Sylvester representation for periodic time-varying modulus matrix by regular perturbations. Science in China Series F: Information Sciences 50(4): 587-599 (2007) | |
| 2006 | ||
| 18 | Saihua Lin, Rong Luo, Huazhong Yang, Hui Wang: A 0.9V 10GHz 71µW Static D Flip-flop by using FinFET Devices. APCCAS 2006: 1795-1798 | |
| 17 | Hong Luo, Huazhong Yang, Rong Luo: Accurate and Fast Estimation of Junction Band-to-Band Leakage in Nanometer-Scale MOSFET. APCCAS 2006: 956-959 | |
| 16 | Yu Wang, Hui Wang, Huazhong Yang: Fine-grain Sleep Transistor Placement Considering Leakage Feedback Gate. APCCAS 2006: 964-967 | |
| 15 | Qihong Ge, Huazhong Yang: A Noise-resilient Channel Estimation Algorithm Based on Two-Dimensional Hadamard Transform for OFDM Systems. ICN/ICONS/MCL 2006: 205 | |
| 14 | Yu Wang, Yongpan Liu, Rong Luo, Huazhong Yang: Genetic Algorithm Based Fine-Grain Sleep Transistor Insertion Technique for Leakage Optimization. ICNC (1) 2006: 716-725 | |
| 13 | Yu Wang, Yongpan Liu, Rong Luo, Huazhong Yang, Hui Wang: Two-phase fine-grain sleep transistor insertion technique in leakage critical circuits. ISLPED 2006: 238-243 | |
| 12 | Yu Wang, Hai Lin, Huazhong Yang, Rong Luo, Hui Wang: Simultaneous Fine-grain Sleep Transistor Placement and Sizing for Leakage Optimization. ISQED 2006: 723-728 | |
| 11 | Hai Lin, Yu Wang, Rong Luo, Huazhong Yang, Hui Wang: IR-drop Reduction Through Combinational Circuit Partitioning. PATMOS 2006: 370-381 | |
| 10 | Saihua Lin, Hongli Gao, Huazhong Yang: Low Clock Swing D Flip-Flops Design by Using Output Control and MTCMOS. PATMOS 2006: 486-495 | |
| 9 | Saihua Lin, Huazhong Yang: Worst Case Crosstalk Noise Effect Analysis in DSM Circuits by ABCD Modeling. PATMOS 2006: 504-513 | |
| 8 | Jun Chen, Rong Luo, Huazhong Yang, Hui Wang: A Low Power ROM-Less Direct Digital Frequency Synthesizer with Preset Value Pipelined Accumulator. VLSI Design 2006: 377-380 | |
| 7 | Yu Wang, Huazhong Yang, Hui Wang: Signal-Path-Level Dual-VT Assignment for Leakage Power Reduction. Journal of Circuits, Systems, and Computers 15(2): 197-216 (2006) | |
| 2005 | ||
| 6 | Zhixin Tian, Huazhong Yang, Rong Luo: Gibbs sampling in power grid analysis. ASP-DAC 2005: 107-110 | |
| 5 | Qihong Ge, Huazhong Yang: Comb-Pattern Optimal Pilot in MIMO-OFDM System. ICCNMC 2005: 84-92 | |
| 4 | Yongpan Liu, Huazhong Yang, Rong Luo, Hui Wang: A Hierarchical Approach for Incremental Floorplan Based on Genetic Algorithms. ICNC (3) 2005: 219-224 | |
| 3 | Juan Wang, Jinguo Quan, Huazhong Yang, Hui Zhong, Sheng Lin: A Robust and Low Complexity Coarse Frequency Offset Estimation Algorithm for DAB Receivers. ICWN 2005: 118-124 | |
| 2 | Hui Zhang, Huazhong Yang, Shuzheng Xu, Hui Wang: Improved Multiuser Detection for Fast FH/MFSK Systems. ICWN 2005: 130-136 | |
| 1999 | ||
| 1 | Huazhong Yang, Rong Luo, Hui Wang, Runsheng Liu: An SA-Based Nonlinear Function Synthesizer for Linear Analog Integrated Circuits. ASP-DAC 1999: 9- | |