Huiying Yang

	2007
4		Huiying Yang, Ranga Vemuri: Efficient Symbolic Sensitivity based Parasitic-Inclusive Optimization in Layout Aware Analog Circuit Synthesis. VLSI Design 2007: 201-206
	2006
3		Huiying Yang, Ranga Vemuri: Efficient temperature-dependent symbolic sensitivity analysis and symbolic performance evaluation in analog circuit synthesis. DATE 2006: 283-284
	2005
2		Huiying Yang, Mukesh Ranjan, Wim Verhaegen, Mengmeng Ding, Ranga Vemuri, Georges G. E. Gielen: Efficient symbolic sensitivity analysis of analog circuits using element-coefficient diagrams. ASP-DAC 2005: 230-235
1		Huiying Yang, Anuradha Agarwal, Ranga Vemuri: Fast Analog Circuit Synthesis Using Multiparameter Sensitivity Analysis Based on Element-Coefficient Diagrams. ISVLSI 2005: 71-76

Coauthor Index

1	Anuradha Agarwal	[1]
2	Mengmeng Ding	[2]
3	Georges G. E. Gielen	[2]
4	Mukesh Ranjan	[2]
5	Ranga Vemuri	[1] [2] [3] [4]
6	Wim Verhaegen	[2]