Jing-ling Yang Coauthor index DBLP Vis pubzone.org

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DBLP keys2004
5Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Pipelines in Dynamic Dual-Rail Circuits. PATMOS 2004: 701-710
4Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJing-ling Yang, Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A high-efficiency strongly self-checking asynchronous datapath. IEEE Trans. on CAD of Integrated Circuits and Systems 23(10): 1484-1494 (2004)
2003
3Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: Design for Self-Checking and Self-Timed Datapath. VTS 2003: 417-430
2002
2Electronic Edition pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJing-ling Yang, Oliver Chiu-sing Choy, Cheong-fat Chan, Kong-Pong Pun: A Totally Self-Checking Dynamic Asynchronous Datapath. Asian Test Symposium 2002: 27-32
1999
1no EE pubzone.org CiteSeerX Google scholar BibTeX bibliographical record in XMLJuraj Povazanec, Oliver Chiu-sing Choy, Cheong-fat Chan, Jan Butas, Yeu-qiu Zhang, Jing-ling Yang, Tin-yan Tang: Pipelined Dataflow Architecture of a Small Processor. PDPTA 1999: 1217-1223

Coauthor Index

1Jan Butas [1]
2Cheong-fat Chan [1] [2] [3] [4] [5]
3Oliver Chiu-sing Choy (Chiu-sing Choy) [1] [2] [3] [4] [5]
4Juraj Povazanec [1]
5Kong-Pong Pun [2] [3] [4] [5]
6Tin-yan Tang [1]
7Yeu-qiu Zhang [1]

Copyright © Mon Dec 21 17:44:35 2009 by Michael Ley (ley@uni-trier.de)