| 2009 | ||
|---|---|---|
| 34 | Joo-Young Kim, Seungjin Lee, Jinwook Oh, Minsu Kim, Hoi-Jun Yoo: A 60fps 496mW multi-object recognition processor with workload-aware dynamic power management. ISLPED 2009: 365-370 | |
| 2008 | ||
| 33 | Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seungjin Lee, Hoi-Jun Yoo: Vision platform for mobile intelligent robot based on 81.6 GOPS object recognition processor. DAC 2008: 96-101 | |
| 32 | Seulki Lee, Jerald Yoo, Hoi-Jun Yoo: A 200Mbps 0.02nJ/b dual-mode inductive coupling transceiver for cm-range interconnection. ISCAS 2008: 1954-1957 | |
| 31 | Joonsung Bae, Joo-Young Kim, Hoi-Jun Yoo: A 0.6pJ/b 3Gb/s/ch transceiver in 0.18 µm CMOS for 10mm on-chip interconnects. ISCAS 2008: 2861-2864 | |
| 30 | Hyejung Kim, Yongsang Kim, Hoi-Jun Yoo: A 6.3nJ/op low energy 160-bit modulo-multiplier for elliptic curve cryptography processor. ISCAS 2008: 3310-3313 | |
| 29 | Byeong-Gyu Nam, Hyejung Kim, Hoi-Jun Yoo: Power and Area-Efficient Unified Computation of Vector and Elementary Functions for Handheld 3D Graphics Systems. IEEE Trans. Computers 57(4): 490-504 (2008) | |
| 2007 | ||
| 28 | Byeong-Gyu Nam, Jeabin Lee, Kwanho Kim, Seung-Jin Lee, Hoi-Jun Yoo: A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains. Graphics Hardware 2007: 73-80 | |
| 27 | Jeabin Lee, Byeong-Gyu Nam, Seong-Jun Song, Namjun Cho, Hoi-Jun Yoo: A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply Voltage for Dynamic Voltage and Frequency Scaling. ISCAS 2007: 2112-2115 | |
| 26 | Seung-Jin Lee, Sunyoung Kim, Hoi-Jun Yoo: A Low Power Digital Signal Processor with Adaptive Band Activation for Digital Hearing Aid Chip. ISCAS 2007: 2730-2733 | |
| 25 | Jeong-Ho Woo, Ju-Ho Sohn, Hyejung Kim, Jongcheol Jeong, Euljoo Jeong, Suk Joong Lee, Hoi-Jun Yoo: A low power multimedia SoC with fully programmable 3D graphics and MPEG4/H.264/JPEG for mobile devices. ISLPED 2007: 238-243 | |
| 24 | Donghyun Kim, Kwanho Kim, Joo-Young Kim, Seung-Jin Lee, Hoi-Jun Yoo: Solutions for Real Chip Implementation Issues of NoC and Their Application to Memory-Centric NoC. NOCS 2007: 30-39 | |
| 2006 | ||
| 23 | Se-Joong Lee, Kwanho Kim, Hyejung Kim, Namjun Cho, Hoi-Jun Yoo: A network-on-chip with 3Gbps/wire serialized on-chip interconnect using adaptive control schemes. DATE 2006: 79-80 | |
| 22 | Ju-Ho Sohn, Jeong-Ho Woo, Jerald Yoo, Hoi-Jun Yoo: Design and test of fixed-point multimedia co-processor for mobile applications. DATE Designers' Forum 2006: 249-253 | |
| 21 | Jerald Yoo, Sunyoung Kim, Namjun Cho, Seong-Jun Song, Hoi-Jun Yoo: A 10µW digital signal processor with adaptive-SNR monitoring for a sub-1V digital hearing aid. ISCAS 2006 | |
| 20 | Jooyoung Kim, Kangmin Lee, Hoi-Jun Yoo: A 372 ps 64-bit adder using fast pull-up logic in 0.18µm CMOS. ISCAS 2006 | |
| 19 | Seong-Jun Song, Seung-Jin Lee, Namjun Cho, Hoi-Jun Yoo: Low Power Wearable Audio Player Using Human Body Communications. ISWC 2006: 125-126 | |
| 18 | Sungdae Choi, Seong-Jun Song, Kyomin Sohn, Hyejung Kim, Jooyoung Kim, Jerald Yoo, Hoi-Jun Yoo: A Low-power Star-topology Body Area Network Controller for Periodic Data Monitoring Around and Inside the Human Body. ISWC 2006: 139-140 | |
| 17 | Kangmin Lee, Se-Joong Lee, Hoi-Jun Yoo: Low-power network-on-chip for high-performance SoC design. IEEE Trans. VLSI Syst. 14(2): 148-160 (2006) | |
| 2005 | ||
| 16 | Sunyoung Kim, Jae-Youl Lee, Seong-Jun Song, Namjun Cho, Hoi-Jun Yoo: A 0.9-V 67-µW analog front-end using adaptive-SNR technique for digital hearing aid. ISCAS (1) 2005: 740-743 | |
| 15 | Kwanho Kim, Se-Joong Lee, Kangmin Lee, Hoi-Jun Yoo: An arbitration look-ahead scheme for reducing end-to-end latency in networks on chip. ISCAS (3) 2005: 2357-2360 | |
| 14 | Donghyun Kim, Kangmin Lee, Se-Joong Lee, Hoi-Jun Yoo: A reconfigurable crossbar switch with adaptive bandwidth control for networks-on-chip. ISCAS (3) 2005: 2369-2372 | |
| 13 | Min-wuk Lee, Byeong-Gyu Nam, Ju-Ho Sohn, Namjun Cho, Hyejung Kim, Kwanho Kim, Hoi-Jun Yoo: A fixed-point 3D graphics library with energy-efficient cache architecture for mobile multimedia systems. ISCAS (5) 2005: 4602-4605 | |
| 12 | Narrijun Cho, Seong-Jun Song, Jae-Youl Lee, Sunyoung Kim, Shiho Kim, Hoi-Jun Yoo: A 8-µW, 0.3-mm2 RF-powered transponder with temperature sensor for wireless environmental monitoring. ISCAS (5) 2005: 4763-4766 | |
| 11 | Se-Joong Lee, Kangmin Lee, Hoi-Jun Yoo: Analysis and Implementation of Practical, Cost-Effective Networks on Chips. IEEE Design & Test of Computers 22(5): 422-433 (2005) | |
| 2004 | ||
| 10 | Ramchan Woo, Sungdae Choi, Ju-Ho Sohn, Seong-Jun Song, Young-Don Bae, Hoi-Jun Yoo: A low-power graphics LSI integrating 29Mb embedded DRAM for mobile multimedia applications. ASP-DAC 2004: 533-534 | |
| 9 | Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo: A programmable vertex shader with fixed-point SIMD datapath for low power wireless applications. Graphics Hardware 2004: 107-114 | |
| 8 | Kangmin Lee, Se-Joong Lee, Hoi-Jun Yoo: SILENT: serialized low energy transmission coding for on-chip interconnection networks. ICCAD 2004: 448-451 | |
| 2003 | ||
| 7 | Sung-Eun Kim, Seong-Jun Song, Sung Min Park, Hoi-Jun Yoo: CMOS optical receiver chipset for gigabit Ethernet applications. ISCAS (1) 2003: 29-32 | |
| 2002 | ||
| 6 | Ju-Ho Sohn, Ramchan Woo, Hoi-Jun Yoo: Optimization of portable system architecture for real-time 3D graphics. ISCAS (1) 2002: 769-772 | |
| 5 | Yong-Ha Park, Jeonghoon Kook, Hoi-Jun Yoo: Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-Chip (SoC) Applications. VLSI Design 2002: 625-630 | |
| 2001 | ||
| 4 | Yong-Ha Park, Seon-Ho Han, Hoi-Jun Yoo: Single chip 3D rendering engine integrating embedded DRAM frame buffer and Hierarchical Octet Tree (HOT) array processor with bandwidth amplification. ASP-DAC 2001: 9-10 | |
| 3 | Jaeseo Lee, Jae-Won Lim, Sung-Jun Song, Sung-Sik Song, Wang-joo Lee, Hoi-Jun Yoo: Design and implementation of CMOS LVDS 2.5 Gb/s transmitter and 1.3 Gb/s receiver for optical interconnections. ISCAS (4) 2001: 702-705 | |
| 2 | Kangmin Lee, Chi Weon Yoon, Ramchan Woo, Jeong-Hun Kook, Ja-Il Koo, Tae-Sung Jung, Hoi-Jun Yoo: A comparative performance analysis of a DDR-SDRAM, a D-RDRAM, and a DDR-FCRAM using a POPeye simulator. ISCAS (5) 2001: 81-84 | |
| 1993 | ||
| 1 | Hoi-Jun Yoo, Seung-Jun Lee, Jeong-Tae Kwon, Wi-Sik Min, Kye-Hwan Oh: A Precision CMOS Voltage Reference with Enhanced Stability for the Application to Advance VLSIs. ISCAS 1993: 1318-1321 | |