Byoung Hee Yoon

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2004

1 Soo Jin Park, Byoung Hee Yoon, Kwang Sub Yoon, Heung Soo Kim: Design of Quaternary Logic Gate Using Double Pass-Transistor Logic with Neuron MOS Down Literal Circuit. ISMVL 2004: 198-203

	2004
1		Soo Jin Park, Byoung Hee Yoon, Kwang Sub Yoon, Heung Soo Kim: Design of Quaternary Logic Gate Using Double Pass-Transistor Logic with Neuron MOS Down Literal Circuit. ISMVL 2004: 198-203

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