| 2001 | ||
|---|---|---|
| 3 | Yi-Chang Lu, Mustafa Celik, Tak Young, Lawrence T. Pileggi: Min/max On-Chip Inductance Models and Delay Metrics. DAC 2001: 341-346 | |
| 2 | Tak Young: Monterey Design. ISQED 2001: 19-20 | |
| 2000 | ||
| 1 | N. S. Nagaraj, Andrzej J. Strojwas, Sani R. Nassif, Ray Hokinson, Tak Young, Wonjae L. Kang, David Overhauser, Sung-Mo Kang: When bad things happen to good chips (panel session). DAC 2000: 736-737 | |
| 1 | Mustafa Celik | [3] |
| 2 | Ray Hokinson | [1] |
| 3 | Sung-Mo Kang | [1] |
| 4 | Wonjae L. Kang | [1] |
| 5 | Yi-Chang Lu | [3] |
| 6 | N. S. Nagaraj | [1] |
| 7 | Sani R. Nassif | [1] |
| 8 | David Overhauser | [1] |
| 9 | Lawrence T. Pileggi (Larry T. Pileggi, Lawrence T. Pillage) | [3] |
| 10 | Andrzej J. Strojwas | [1] |