Chun-Wang Yu

	2006
3		Tze-Yun Sung, Yaw-Shih Shieh, Chun-Wang Yu, Hsi-Chin Hsin: Low-Power Multiplierless 2-D DWT and IDWT Architectures Using 4-tap Daubechies Filters. PDCAT 2006: 185-190
2		Tze-Yun Sung, Yaw-Shih Shieh, Chun-Wang Yu, Hsi-Chin Hsin: High-Efficiency and Low-Power Architectures for 2-D DCT and IDCT Based on CORDIC Rotation. PDCAT 2006: 191-196
1		Tze-Yun Sung, Yaw-Shih Shieh, Chun-Wang Yu, Hsi-Chin Hsin: A High-Efficiency Vector Interpolator Using Redundant CORDIC Arithmetic in Power-Aware 3-D Graphics Rendering. PDCAT 2006: 44-49

Coauthor Index

1	Hsi-Chin Hsin	[1] [2] [3]
2	Yaw-Shih Shieh	[1] [2] [3]
3	Tze-Yun Sung	[1] [2] [3]