 | 2008 |
|---|
| 9 |       | Yasushi Yuminaka,
Yasunori Takahashi:
Time-Domain Pre-Emphasis Techniques for Equalization of Multiple-Valued Data.
ISMVL 2008: 20-25 |
| 2007 |
|---|
| 8 | | Yasushi Yuminaka,
Kazuyoshi Yamamura:
Equalization Techniques for Multiple-Valued Data Transmission and Their Application.
ISMVL 2007: 26 |
| 2002 |
|---|
| 7 | | Yasushi Yuminaka,
Tatsuya Morishita,
Takafumi Aoki,
Tatsuo Higuchi:
Multiple-Valued Data Recovery Techniques for Band-Limited Channels in VLSI.
ISMVL 2002: 54-60 |
| 2000 |
|---|
| 6 | | Yasushi Yuminaka,
Osamu Katoh,
Yoshisat Sasaki,
Takafumi Aoki,
Tatsuo Higuchi:
An Efficient Data Transmission Technique for VLSI Systems Based on Multiple-Valued Code-Division Multiple Access.
ISMVL 2000: 430-437 |
| 1998 |
|---|
| 5 | | Yasushi Yuminaka,
Yoshisat Sasaki,
Takafumi Aoki,
Tatsuo Higuchi:
Wave-Parallel Computing Systems using Multiple-Valued Pseudo-Orthogonal Sequences.
ISMVL 1998: 148- |
| 1996 |
|---|
| 4 | | Yasushi Yuminaka,
Yoshisato Sasaki,
Takafumi Aoki,
Tatsuo Higuchi:
Wave-Parallel Computing Technique for Neural Networks Based on Amplitude-Modulated Waves.
ISMVL 1996: 210-215 |
| 1994 |
|---|
| 3 |  | Yasushi Yuminaka,
Takafumi Aoki,
Tatsuo Higuchi:
Design of Wave-Parallel Computing Circuits for Densely Connected Architectures.
ISMVL 1994: 207-214 |
| 1993 |
|---|
| 2 | | Yasushi Yuminaka,
Takafumi Aoki,
Tatsuo Higuchi:
Design of Set-Valued Logic Networks for Wave-Parallel Computing.
ISMVL 1993: 277-282 |
| 1991 |
|---|
| 1 | | Yasushi Yuminaka,
Takafumi Aoki,
Tatsuo Higuchi:
Design of a Set Logic Network Based on Frequency Multiplexing and Its Applications to Image Processing.
ISMVL 1991: 8-15 |
