Xuan Zeng

	2009
37		Duo Li, Sheldon X.-D. Tan, Gengsheng Chen, Xuan Zeng: Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method. ASP-DAC 2009: 272-277
36		Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan Yang, Xuan Zeng: Statistical reliability analysis under process variation and aging effects. DAC 2009: 514-519
35		Chunyang Feng, Hai Zhou, Changhao Yan, Jun Tao, Xuan Zeng: Provably good and practically efficient algorithms for CMP dummy fill. DAC 2009: 539-544
34		Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng: Multicore parallel min-cost flow algorithm for CAD applications. DAC 2009: 832-837
33		Qiang Fu, Wai-Shing Luk, Jun Tao, Changhao Yan, Xuan Zeng: Characterizing Intra-Die Spatial Correlation Using Spectral Density Fitting Method. IEICE Transactions 92-A(7): 1652-1659 (2009)
32		Hengliang Zhu, Xuan Zeng, Xu Luo, Wei Cai: Generalized Stochastic Collocation Method for Variation-Aware Capacitance Extraction of Interconnects Considering Arbitrary Random Probability. IEICE Transactions 92-C(4): 508-516 (2009)
	2008
31		Yi Wang, Wai-Shing Luk, Xuan Zeng, Jun Tao, Changhao Yan, Jiarong Tong, Wei Cai, Jia Ni: Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays. DAC 2008: 223-226
30		Yi Wang, Xuan Zeng, Jun Tao, Hengliang Zhu, Xu Luo, Changhao Yan, Wei Cai: Adaptive Stochastic Collocation Method (ASCM) for Parameterized Statistical Timing Analysis with Quadratic Delay Model. ISQED 2008: 62-67
29		Qiang Fu, Wai-Shing Luk, Jun Tao, Changhao Yan, Xuan Zeng: Characterizing Intra-Die Spatial Correlation Using Spectral Density Method. ISQED 2008: 718-723
28		Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng: Model Order Reduction of Parameterized Interconnect Networks via a Two-Directional Arnoldi Process. IEEE Trans. on CAD of Integrated Circuits and Systems 27(9): 1571-1582 (2008)
27		Yi Wang, Xuan Zeng, Jun Tao, Hengliang Zhu, Wei Cai: Adaptive Stochastic Collocation Method for Parameterized Statistical Timing Analysis with Quadratic Delay Model. IEICE Transactions 91-A(12): 3465-3473 (2008)
	2007
26		Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng: Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic. ASP-DAC 2007: 203-208
25		Peng Zhang, Wai-Shing Luk, Yu Song, Jiarong Tong, Pushan Tang, Xuan Zeng: WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design. ASP-DAC 2007: 209-214
24		Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou, Charles Chiang: Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations. ASP-DAC 2007: 474-479
23		Hengliang Zhu, Xuan Zeng, Wei Cai, Jintao Xue, Dian Zhou: A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology. DATE 2007: 1514-1519
22		Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng: Parameterized model order reduction via a two-directional Arnoldi process. ICCAD 2007: 868-873
21		Fan Yang, Xuan Zeng, Yangfeng Su, Dian Zhou: RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect. ISCAS 2007: 2710-2713
20		Ming-e Jing, Yue Hao, Dian Zhou, Xuan Zeng: A Novel Optimization Method for Parametric Yield: Uniform Design Mapping Distance Algorithm. IEEE Trans. on CAD of Integrated Circuits and Systems 26(6): 1149-1155 (2007)
	2006
19		Hengliang Zhu, Xuan Zeng, Wei Cai, Dian Zhou: A Spectral Stochastic Collocation Method for Capacitance Extraction of Interconnects with Process Variations. APCCAS 2006: 1095-1098
18		Xuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles Chiang: Time domain model order reduction by wavelet collocation method. DATE 2006: 21-26
17		Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles Chiang: A one-shot projection method for interconnects with process variations. ISCAS 2006
	2005
16		Bang Liu, Xuan Zeng, Yangfeng Su, Jun Tao, Zhaojun Bai, Charles Chiang, Dian Zhou: Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits. ASP-DAC 2005: 244-249
15		Xuan Zeng, Bank Liu, Jun Tao, Charles Chiang, Dian Zhou: A novel wavelet method for noise analysis of nonlinear circuits. ASP-DAC 2005: 471-476
14		Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng: Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires. ISCAS (1) 2005: 113-116
13		Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng: Power-optimal simultaneous buffer insertion/sizing and wire sizing for two-pin nets. IEEE Trans. on CAD of Integrated Circuits and Systems 24(12): 1915-1924 (2005)
	2004
12		Jian Wang, Jun Tao, Xuan Zeng, Charles Chiang, Dian Zhou: Analog circuit behavioral modeling via wavelet collocation method with auto-companding. ASP-DAC 2004: 45-50
11		Lihong Feng, Xuan Zeng, Charles Chiang, Dian Zhou, Qiang Fang: Direct Nonlinear Order Reduction with Variational Analysis. DATE 2004: 1316-1321
10		Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles Chiang: Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method. DATE 2004: 1322-1326
9		Yangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles Chiang, Dian Zhou: SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits. ICCAD 2004: 74-79
8		Lihong Feng, Xuan Zeng, Jiarong Tong, Charles Chiang, Dian Zhou: Two-sided projection method in variational equation model order reduction of nonlinear circuits. ISCAS (4) 2004: 816-819
7		Jian Wang, Xuan Zeng, Wei Cai, Charles Chiang, Jiarong Tong, Dian Zhou: Frequency domain wavelet method with GMRES for large-scale linear circuit simulation. ISCAS (5) 2004: 321-324
	2003
6		Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng: Power-Optimal Simultaneous Buffer Insertion/Sizing and Wire Sizing. ICCAD 2003: 581-587
5		Xuan Zeng, Jun Tao, Yangfeng Su, Wenbing Chen, Dian Zhou: An error distribution based nonlinear companding method for analog behavioral modeling via wavelet approximation. ISCAS (3) 2003: 168-171
4		Xuan Zeng, Sheng Huang, Yangfeng Su, Dian Zhou: An efficient Sylvester equation solver for time domain circuit simulation by wavelet collocation method. ISCAS (4) 2003: 664-667
	2002
3		Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling: Wavelet method for high-speed clock tree simulation. ISCAS (1) 2002: 177-180
	2001
2		Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling: Behavioral Modeling of Analog Circuits by Wavelet Collocation Method. ICCAD 2001: 65-69
1		Xin Li, Bo Hu, Xieting Ling, Xuan Zeng: A wavelet balance approach for steady-state analysis of nonlinear circuits. ISCAS (3) 2001: 73-76

Coauthor Index

1	Zhaojun Bai	[9] [16] [22] [28]
2	Wei Cai	[7] [17] [18] [19] [23] [24] [27] [30] [31] [32]
3	Gengsheng Chen	[37]
4	Wenbing Chen	[5]
5	Charles Chiang	[7] [8] [9] [10] [11] [12] [15] [16] [17] [18] [24]
6	Qiang Fang	[11]
7	Chunyang Feng	[35]
8	Lihong Feng	[8] [11] [17] [18]
9	Qiang Fu	[29] [33]
10	Yue Hao	[20]
11	Bo Hu	[1]
12	Sheng Huang	[4]
13	Ming-e Jing	[20]
14	Duo Li	[37]
15	Ruiming Li	[6] [10] [13] [14]
16	Xin Li	[1] [2] [3]
17	Yung-Ta Li	[22] [28]
18	Xieting Ling	[1] [2] [3]
19	Bang Liu	[16]
20	Bank Liu	[15]
21	Jin Liu	[6] [10] [13] [14]
22	Xuexin Liu	[26]
23	Yinghai Lu	[34] [36]
24	Wai-Shing Luk	[25] [26] [29] [31] [33]
25	Xu Luo	[30] [32]
26	Jia Ni	[31]
27	Li Shang	[34] [36]
28	Yu Song	[25] [26]
29	Yangfeng Su	[4] [5] [9] [16] [17] [18] [21] [22] [24] [28]
30	Sheldon X.-D. Tan (Xiang-Dong Tan)	[37]
31	Pushan Tang	[25] [26]
32	Jun Tao	[5] [12] [15] [16] [17] [24] [27] [29] [30] [31] [33] [35]
33	Jiarong Tong	[7] [8] [25] [31]
34	Jian Wang	[7] [9] [12]
35	Yi Wang	[27] [30] [31]
36	Jintao Xue	[23]
37	Changhao Yan	[29] [30] [31] [33] [35]
38	Fan Yang	[17] [21] [36]
39	Peng Zhang	[25]
40	Dian Zhou	[2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [23] [24]
41	Hai Zhou	[34] [35] [36]
42	Xin Zhou	[10]
43	Hengliang Zhu	[19] [23] [27] [30] [32] [36]