 | 2008 |
|---|
| 6 |       | Andreas Lankes,
Thomas Wild,
Johannes Zeppenfeld:
System Level Simulation of Autonomic SoCs with TAPES.
ARCS 2008: 9-22 |
| 5 |  | Johannes Zeppenfeld,
Abdelmajid Bouajila,
Walter Stechele,
Andreas Herkersdorf:
Learning Classifier Tables for Autonomic Systems on Chip.
GI Jahrestagung (2) 2008: 771-778 |
| 2007 |
|---|
| 4 | | Christopher Claus,
Johannes Zeppenfeld,
Florian Helmut Müller,
Walter Stechele:
Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system.
DATE 2007: 498-503 |
| 3 | | Andreas Lankes,
Thomas Wild,
Johannes Zeppenfeld:
Power Estimation of Time Variant SoCs with TAPES.
DSD 2007: 261-264 |
| 2 | | Christopher Claus,
Florian Helmut Müller,
Johannes Zeppenfeld,
Walter Stechele:
A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration.
IPDPS 2007: 1-7 |
| 2006 |
|---|
| 1 | | Abdelmajid Bouajila,
Johannes Zeppenfeld,
Walter Stechele,
Andreas Herkersdorf,
Andreas Bernauer,
Oliver Bringmann,
Wolfgang Rosenstiel:
Organic Computing at the System on Chip Level.
VLSI-SoC 2006: 338-341 |
