Qingli Zhang

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2008

3 Qingli Zhang, Jinxiang Wang, Yizheng Ye: Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters. VLSI Design 2008: 377-382

2006

2 Qingli Zhang, Jinxiang Wang, Yizheng Ye: An energy-efficient temporal encoding circuit technique for on-chip high performance buses. ACM Great Lakes Symposium on VLSI 2006: 422-427

1 Qingli Zhang, Jinxiang Wang, Yizheng Ye: Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses. APCCAS 2006: 1611-1614

	2008
3		Qingli Zhang, Jinxiang Wang, Yizheng Ye: Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters. VLSI Design 2008: 377-382
	2006
2		Qingli Zhang, Jinxiang Wang, Yizheng Ye: An energy-efficient temporal encoding circuit technique for on-chip high performance buses. ACM Great Lakes Symposium on VLSI 2006: 422-427
1		Qingli Zhang, Jinxiang Wang, Yizheng Ye: Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses. APCCAS 2006: 1611-1614

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