Zhi Zhu

	2009
4		Wanping Zhang, Yi Zhu, Wenjian Yu, Amirali Shayan Arani, Renshen Wang, Zhi Zhu, Chung-Kuan Cheng: Noise minimization during power-up stage for a multi-domain power network. ASP-DAC 2009: 391-396
	2008
3		Wanping Zhang, Yi Zhu, Wenjian Yu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, Chung-Kuan Cheng: Finding the Worst Voltage Violation in Multi-Domain Clock Gated Power Network. DATE 2008: 537-540
	2007
2		Wanping Zhang, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Noriyuki Ito, Chung-Kuan Cheng: Fast power network analysis with multiple clock domains. ICCD 2007: 456-463
	2004
1		Vishak Venkatraman, Andrew Laffely, Jinwook Jang, Hempraveen Kukkamalla, Zhi Zhu, Wayne Burleson: NoCIC: a spice-based interconnect planning tool emphasizing aggressive on-chip interconnect circuit methods. SLIP 2004: 69-75

Coauthor Index

1	Amirali Shayan Arani	[4]
2	Wayne P. Burleson (Wayne Burleson)	[1]
3	Chung-Kuan Cheng	[2] [3] [4]
4	Lew Chua-Eoan	[2] [3]
5	Noriyuki Ito	[2]
6	Nuriyoki Ito	[3]
7	Jinwook Jang	[1]
8	Hempraveen Kukkamalla	[1]
9	Andrew Laffely	[1]
10	Rajeev Murgai	[2] [3]
11	He Peng	[2] [3]
12	Rui Shi	[2] [3]
13	Toshiyuki Shibuya	[2] [3]
14	Vishak Venkatraman	[1]
15	Renshen Wang	[4]
16	Wenjian Yu	[3] [4]
17	Ling Zhang	[2] [3]
18	Wanping Zhang	[2] [3] [4]
19	Yi Zhu	[3] [4]

Colors in the list of coauthors