Daniel Ziener

	2008
3		Daniel Ziener, Jürgen Teich: Concepts for Autonomous Control Flow Checking for Embedded CPUs. ATC 2008: 234-248
2		Daniel Ziener, Jürgen Teich: Power Signature Watermarking of IP Cores for FPGAs. Signal Processing Systems 51(1): 123-136 (2008)
	2006
1		Daniel Ziener, Stefan Assmus, Jürgen Teich: Identifying FPGA IP-Cores Based on Lookup Table Content Analysis. FPL 2006: 1-6

Coauthor Index

1	Stefan Assmus	[1]
2	Jürgen Teich	[1] [2] [3]